u-blox LARA-R203 System Integration Manual page 16

Size-optimized lte cat 1 modules in single and multi-mode configurations
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Function
Pin Name
SDIO_CMD
Audio
I2S_TXD
I2S_RXD
I2S_CLK
I2S_WA
Clock
GPIO6
output
GPIO
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
Reserved
RSVD
RSVD
Table 3: LARA-R2 series modules pin definition, grouped by function
UBX-16010573 - R12
Pin No
I/O
Description
46
I/O
SDIO command
35
O /
I
2
S transmit data /
I/O
GPIO
2
37
I /
I
S receive data /
I/O
GPIO
36
I/O /
I
2
S clock /
I/O
GPIO
2
34
I/O /
I
S word alignment /
I/O
GPIO
19
O
Clock output
16
I/O
GPIO
23
I/O
GPIO
24
I/O
GPIO
25
I/O
GPIO
42
I/O
GPIO
33
N/A
RESERVED pin
31, 97, 98
N/A
RESERVED pin
LARA-R2 series - System Integration Manual
Remarks
Not supported by "02" and "62" product versions.
SDIO interface for communication with u-blox Wi-Fi module
See section 1.9.5 for functional description.
See section 2.6.5 for external circuit design-in.
I
2
S transmit data output, alternatively configurable as GPIO.
I
2
S not supported by LARA-R204-02B and LARA-R220-62B.
See sections 1.10 and 1.12 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
2
I
S receive data input, alternatively configurable as GPIO.
2
I
S not supported by LARA-R204-02B and LARA-R220-62B.
See sections 1.10 and 1.12 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
I
2
S serial clock, alternatively configurable as GPIO.
I
2
S not supported by LARA-R204-02B and LARA-R220-62B.
See sections 1.10 and 1.12 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
2
I
S word alignment, alternatively configurable as GPIO.
2
I
S not supported by LARA-R204-02B and LARA-R220-62B.
See sections 1.10 and 1.12 for functional description.
See sections 2.7 and 2.8 for external circuit design-in.
1.8 V configurable clock output.
See section 1.11 for functional description.
See section 2.7 for external circuit design-in.
1.8 V GPIO with alternatively configurable functions.
See section 1.12 for functional description.
See section 2.8 for external circuit design-in.
1.8 V GPIO with alternatively configurable functions.
See section 1.12 for functional description.
See section 2.8 for external circuit design-in.
1.8 V GPIO with alternatively configurable functions.
See section 1.12 for functional description.
See section 2.8 for external circuit design-in.
1.8 V GPIO with alternatively configurable functions.
See section 1.12 for functional description.
See section 2.8 for external circuit design-in.
1.8 V GPIO with alternatively configurable functions.
See section 1.12 for functional description.
See section 2.8 for external circuit design-in.
This pin must be connected to ground.
See sections 1.13 and 2.9
Internally not connected. Leave unconnected.
See sections 1.13 and 2.9
System description
Page 16 of 157

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