u-blox LARA-R203 System Integration Manual page 14

Size-optimized lte cat 1 modules in single and multi-mode configurations
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Function
Pin Name
UART
RXD
TXD
CTS
RTS
DSR
RI
DTR
DCD
USB
VUSB_DET
USB_D-
UBX-16010573 - R12
Pin No
I/O
Description
13
O
UART data output
12
I
UART data input
UART clear to send
11
O
output
10
I
UART ready to
send input
6
O
UART data set
ready output
7
O
UART ring
indicator output
9
I
UART data
terminal ready
input
8
O
UART data carrier
detect output
17
I
USB detect input
28
I/O
USB Data Line D-
LARA-R2 series - System Integration Manual
Remarks
1.8 V output, Circuit 104 (RXD) in ITU-T V.24,
for AT commands, data communication, FOAT, FW update by
u-blox EasyFlash tool and diagnostic.
Test-Point and series 0  for diagnostic access recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
1.8 V input, Circuit 103 (TXD) in ITU-T V.24,
for AT commands, data communication, FOAT, FW update by
u-blox EasyFlash tool and diagnostic.
Internal active pull-up to V_INT.
Test-Point and series 0  for diagnostic access recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
1.8 V output, Circuit 106 (CTS) in ITU-T V.24.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
1.8 V input, Circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up to V_INT.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
1.8 V output, Circuit 107 (DSR) in ITU-T V.24.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
1.8 V output, Circuit 125 (RI) in ITU-T V.24.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
1.8 V input, Circuit 108/2 (DTR) in ITU-T V.24.
Internal active pull-up to V_INT.
Test-Point and series 0  for diagnostic access recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
1.8 V input, Circuit 109 (DCD) in ITU-T V.24.
Test-Point and series 0  for diagnostic access recommended.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
VBUS (5 V typical) USB supply generated by the host must be
connected to this input pin to enable the USB interface.
If the USB interface is not used by the Application Processor,
Test-Point for diagnostic / FW update access recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
USB interface for AT commands, data communication, FOAT,
FW update by u-blox EasyFlash tool and diagnostic.
90  nominal differential impedance (Z
30  nominal common mode impedance (Z
Pull-up or pull-down resistors and external series resistors as
required by the USB 2.0 specifications [9] are part of the USB
pin driver and need not be provided externally.
If the USB interface is not used by the Application Processor,
Test-Point for diagnostic / FW update access is recommended.
See section 1.9.2 for functional description.
See section 2.6.2 for external circuit design-in.
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CM
System description
Page 14 of 157

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