Siemens SITRANS FUG1010 IP65 NEMA 4X Instruction Manual page 7

Errata
PGEN Wiring Diagram
The unit must be wired as shown below before assigning PGEN output pulses.
1010N-1
MAIN BOARD
+5V
DPGEN_2-Ø2
2 4
TTL/CMOS
DPGEN_1-Ø2
1
+5V
DPGEN_2-Ø1
2 4
TTL/CMOS
DPGEN_1-Ø1
1
NOTES
1. TB2-9 & TB2-11 are Open Collector Outputs that
require external pull up resistors for operation.
See table on next page for External Supply Voltage
and suggested resistor value and ratings.
Maximum current into the transistor is 100mA.
Maximum Voltage is +36Vdc.
CAUTION: Negative voltages with respect ground will
permanently damage the transistors.
1010N-7K, -7K2 or 7K3 I/O MODULES WITH ULTRA PRECISION FLOWMETERS
OPEN COLLECTOR USER RESISTOR RECOMMENDATIONS
USER SUPPLY
VOLTAGE
[Vdc]
5
9
12
18
24
28
36
1010N-7K, -7K2 OR -7K3
I/O CONNECTION BOARD
PG4
TB2-12 DPGEN_2-Ø2
TTL LOGIC
QUADRATURE PHASE
TB2-4 GND
[VO2-]
PG3
TB2-11 DPGEN_1-Ø2
OPEN COLLECTOR
QUADRATURE PHASE
TB2-4 GND
[VO2-]
PG2
TB2-10 DPGEN_2-Ø1
TTL LOGIC
REFERENCE PHASE
TB2-2 GND
[VO1-]
PG1
TB2-09 DPGEN_1-Ø1
OPEN COLLECTOR
REFERENCE PHASE
TB2-2 GND
[VO1-]
EXPECTED
EXTERNAL
CURRENT DRAW
R1 OR R2
[Ohms]
270
510
680
1000
1500
1800
2400
E-2
TTL PGEN SIGNAL
GROUND
SEE TABLE
OC PGEN SIGNAL
GROUND
TTL PGEN SIGNAL
GROUND
SEE TABLE
OC PGEN SIGNAL
GROUND
2: TB2-10 & TB2-12 are TTL/CMOS compatible outputs.
No pullup resistor is required.
CAUTION: Application of any external voltage, even
via a resistor, could permanently damage this circuit.
RECOMMENDED
RESISTOR WATTAGE
[mA]
[WATTS]
18.5
17.6
17.6
18
16
15.5
15
1010FMA-46
TO END USER
EQUIPMENT
5-36VDC, 15-20mA
NOMINAL CURRENT
CONSUMPTION
TO END USER
EQUIPMENT
TO END USER
EQUIPMENT
5-36VDC, 15-20mA
NOMINAL CURRENT
CONSUMPTION
TO END USER
EQUIPMENT
1/2
1/2
1/2
3/4
1
1-1/4
1-1/4