Digital Interface; Connection To The Phi Controller; Table 3-1. Phi Connector Pin Functions - Texas Instruments ADS131B26Q1EVM-PDK User Manual

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3 Digital Interface

As noted in Section 1, the EVM interfaces with the PHI controller and communicates with the PC over USB.
There are two devices on the EVM with which the PHI controller communicates: the ADS131B26-Q1 (by SPI)
2
and the EEPROM (by I C). The EEPROM comes preprogrammed with the information required to configure and
initialize the ADS131B26Q1EVM-PDK GUI software. When the hardware is initialized, the EEPROM is no longer
used.

3.1 Connection to the PHI Controller

The ADS131B26Q1EVM-PDK communicates with the PHI controller through a shrouded, 60-pin connector (J9).
There are two round standoffs next to J9 with Phillips-head screws. To connect the PHI controller to the EVM,
remove the screws, attach the PHI controller to the EVM, and replace the screws into the standoffs. The screws
secure the EVM to the PHI and makes sure the connection between the two boards is complete.
Table 3-1 lists the different PHI connection and their functions.
PHI Connector Pin Name
EVM_REG_5.5V
EVM_RAW_5V
ISO_GND
ISO_GPIO0/MHD
ISO_GPIO1
ISO_GPIO2/FAULT
ISO_GPIO3/OCCA
ISO_GPIO4/OCCB
ISO_SDI
ISO_CSn
ISO_SCLK
ISO_CAPCLK
ISO_DRDYn
ISO_SDO
ISO_RESETn
WP
ISO_3V3
EVM_ID_SDA
EVM_ID_SCL
ID_PWR
ISO_GND
SBAU413 – OCTOBER 2022
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Table 3-1. PHI Connector Pin Functions

PHI Connector Pin
J9[1] Boosted 5.5-V supply from the USB (not used)
J9[2] Raw USB 5-V supply; optional supply for the DC/DC input
J9[3] Ground connection for the isolated host controller side of the EVM
J9[6] General-purpose digital input/output 0 or missing host detect output
J9[8] General-purpose digital input/output 1
J9[10] General-purpose digital input/output 2 or fault output
General-purpose digital input/output 3 or overcurrent comparator A
J9[12]
output
General-purpose digital input/output 4 or overcurrent comparator B
J9[14]
output
J9[18] SPI: Serial data input to the ADC
J9[22] SPI: Chip-select input from the PHI controller; active low
J9[24] SPI: Serial data clock input
PHI clock signal to synchronize SPI transactions with the
J9[26, 28]
propagation delay from the EVM
J9[30] SPI: Data-ready output from the ADC; active low
J9[38] SPI: Serial data output from the ADC
J9[46] Reset input; active low
J9[49] Write protection for the EEPROM
Power-supply source for the isolated host controller side of the EVM
J9[50]
and default supply input to the DC/DC circuit
2
J9[56] I C serial data for the EEPROM
2
J9[58] I C serial clock for the EEPROM
J9[59] Power-supply source for the EEPROM
J9[60] Ground connection for the isolated host controller side of the EVM
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Digital Interface
Function
ADS131B26Q1EVM-PDK Evaluation Module 9