Ads131B26Q1Evm-Pdk Software Reference; Global Settings For Adc Control; Figure 6-1. Evm Gui Global Input Parameters - Texas Instruments ADS131B26Q1EVM-PDK User Manual

Evaluation module
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ADS131B26Q1EVM-PDK Software Reference

6 ADS131B26Q1EVM-PDK Software Reference

6.1 Global Settings for ADC Control

Figure 6-1
displays the default view of the ADS131B26-Q1 EVM GUI after start-up and successful connection to
the EVM hardware. The EVM connection status can be verified by observing the green light indicator next to HW
Connected at the bottom of the screen.
The Pages section at the top-left corner of the window lists the multiple register map controls and data analysis
tools supported in this GUI.
Q1 register settings.
Section 6.3.1
conversion data from the high-resolution, 24-bit ADC channels and the 16-bit sequencer ADC channels.
Below the Pages section is an abbreviated list of device commands, which execute the RESET, LOCK, and
UNLOCK SPI op-codes. The RESET command restores the device register configuration to the power-on default
settings. The LOCK command locks the interface to prevent unwanted commands from changing the state of the
device. The UNLOCK command unlocks the interface to allow device configuration changes.
In the Data Capture Configuration section are basic settings and controls to initiate a data capture from the
main ADC channels. OSR13A and OSR13B allow data rates to be configured for ADC1A, ADC1B, ADC3A, and
ADC3B. DRDYn Driving Source selects which ADC channel generates the data-ready interrupt used for data
collection. The Samples drop-down menu allows the user to choose from a prepopulated list of sample sizes or
to enter a custom sample quantity. The number of samples are collected contiguously in a single data set when
the Capture button is clicked from any of the analysis tool pages.
The CLK Frequency (Hz) and Data Rate (SPS) fields display the current clock frequency and ADC data rate
based on the current OSR settings. If a target SCLK frequency (Hz) is specified, the GUI tries to match this
frequency as closely as possible by changing the PHI PLL settings.
The GUI is switched between hardware mode and simulation mode by checking and unchecking the Connect to
Hardware box in the top-right area of the screen at any time.
16
ADS131B26Q1EVM-PDK Evaluation Module
Section 6.2.1
through
Section 6.2.3
through
Section 6.3.4
Pages
Device
Commands
Data Capture
Con gura on
Clocks and
Data Rate

Figure 6-1. EVM GUI Global Input Parameters

Copyright © 2022 Texas Instruments Incorporated
detail the pages that configure the ADS131B26-
detail the pages that display and analyze the raw
Connec on
Status
www.ti.com
SBAU413 – OCTOBER 2022
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