Using A Target-System Clock; Target-System-Generated Test Clock - Texas Instruments TMS320C6000 Reference Manual

Connections Between the Emulator and the Target System
7.2

Using a Target-System Clock

Figure 4 shows an application with the system test clock generated in the
target system. In this application, the TCK signal is left unconnected.
Figure 4.

Target-System-Generated Test Clock

JTAG Device
System Test Clock
Note: When the TMS/TDI lines are buffered, pullup resistors should be used to hold the buffer inputs at a known level when the
emulator cable is not connected.
There are two benefits to having the target system generate the test clock:
-
-
12 Designing for JTAG Emulation
Greater Than
6 Inches
V CC
13
EMU0
14
EMU1
TRST
TMS
TDI
TDO
11
TCK NC
The emulator provides only a single 10.368-MHz test clock. If you allow
the target system to generate your test clock, you can set the frequency
to match your system requirements.
In some cases, you may have other devices in your system that require
a test clock when the emulator is not connected. The system test clock
also serves this purpose.
Emulator Header
5
EMU0 PD
EMU1
2 4
TRST GND
1 6
TMS GND
3 8
TDI GND
7 10
TDO GND
12
TCK GND
9
TCK_RET
V CC
GND
SPRU641