Connections Between the Emulator and the Target System
7
Connections Between the Emulator and the Target System
It is extremely important to provide high-quality signals between the emulator
and the JTAG target system. Depending upon the situation, you must supply
the correct signal buffering, test clock inputs, and multiple processor intercon-
nections to ensure proper emulator and target system operation.
Signals applied to the EMU0 and EMU1 pins on the JTAG target device can
be either input or output (I/O). In general, these two pins are used as both input
and output in multiprocessor systems to handle global run/stop operations.
EMU0 and EMU1 signals are applied only as inputs to the XDS510 emulator
header.
7.1
Buffering Signals
If the distance between the emulation header and the JTAG target device is
greater than 6 inches, the emulation signals must be buffered. If the distance
is less than 6 inches, no buffering is necessary. The following illustrations
depict these two situations.
-
JTAG Device
The EMU0 and EMU1 signals must have pullup resistors connected to V
provide a signal rise time of less than 10 µs. Refer to the device datasheet for
the recommended resistor value.
10
Designing for JTAG Emulation
No signal buffering. In this situation, the distance between the header
and the JTAG target device should be no more than 6 inches.
6 Inches or Less
V CC
13
EMU0
14
EMU1
TRST
TMS
TDI
TDO
11
TCK
Emulator Header
5
EMU0
PD
EMU1
2
4
TRST
GND
1
6
TMS
GND
8
3
TDI
GND
7
10
TDO
GND
12
TCK
GND
9
TCK_RET
V CC
GND
to
CC
SPRU641
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