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5. REGISTER QUICK REFERENCE
Default values are shown below the bit names
AD
Function
7
01h
Device ID
A & B
p 48
0
02h
Device ID
C & D
p 48
0
03h
Device ID
E & F
p 48
0
04h
Variant ID
0
05h
Revision ID
p 48
x
06h
BASE RATE[1:0]
Clock &
SP Sel.
p 49
0
07h
SDOUTx SW[1:0]
Sample
Width Sel.
p 50
1
08h
INV SCLK
SP Control
p 50
0
09h
Reserved
SP Data
Sel.
p 51
0
0Ah
Reserved
1
0Bh
Reserved
1
0Ch
Reserved
1
0Dh
Reserved
1
0Eh
Reserved
Reserved
0
0Fh
Reserved
ADC
Control 1
p 52
1
MUTE
10h
ADC
ADC4
Control 2
p 52
1
11h
Reserved
1
12h
DAC
Control 1
p 53
1
13h
DAC
Control 2
p 53
1
14h
Reserved
DAC
Control 3
p 54
1
15h
VQ RAMP
DAC
Control 4
p 54
0
DS900F2
.
6
5
(Read Only Bits are shown in Italics)
DEV. ID A[3:0]
1
0
DEV. ID C[3:0]
0
1
DEV. ID E[3:0]
0
0
Reserved [3:0]
0
0
ALPHA REV. ID[3:0]
x
x
SPEED MODE[1:0]
0
0
INPUT SW[1:0]
1
1
Reserved[2:0]
1
0
Reserved
DAC1-4 SOURCE[2:0]
0
0
1
1
1
1
1
1
1
1
Reserved[2:0]
0
0
Reserved
VA_SEL
1
0
MUTE
MUTE
ADC3
ADC2
1
1
Reserved[2:0]
1
1
DAC1-4 NG[2:0]
1
1
Reserved[2:0]
1
1
DAC1-4
Reserved
ATT.
0
1
Reserved[1:0]
0
0
4
3
0
0
1
0
0
0
0
0
x
x
MCLK RATE[2:0]
0
0
Reserved[1:0]
1
1
SP FORMAT[1:0]
0
1
0
0
Reserved[7:0]
1
1
Reserved[7:0]
1
1
Reserved[7:0]
1
1
Reserved[7:0]
1
1
0
0
ENABLE
INV. ADC4
HPF
0
0
MUTE
PDN
ADC1
ADC4
1
1
Reserved
Reserved
0
0
DAC1-4 DE
Reserved
0
0
Reserved
INV. DAC4
0
0
Reserved
MUTE DAC4
1
1
Reserved
PDN DAC4
1
1
CS4244
2
1
DEV. ID B[3:0]
0
1
DEV. ID D[3:0]
1
0
DEV. ID F[3:0]
0
0
Reserved [3:0]
0
0
NUMERIC REV. ID[3:0]
x
x
1
0
Reserved[1:0]
1
1
SDO CHAIN
0
0
Reserved[2:0]
0
0
1
1
1
1
1
1
1
1
Reserved[3:0]
0
0
INV. ADC3
INV. ADC2
0
0
PDN
PDN
ADC3
ADC2
1
1
Reserved
Reserved
0
0
Reserved
Reserved
0
0
INV. DAC3
INV. DAC2
0
0
MUTE DAC3
MUTE DAC2
1
1
PDN DAC3
PDN DAC2
1
1
0
0
0
0
0
x
Reserved
0
1
MSTR/SLV
0
1
1
1
1
1
0
INV. ADC1
0
PDN
ADC1
1
Reserved
0
0
INV. DAC1
0
MUTE DAC1
1
PDN DAC1
1
45
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