CLK-104a/b Boards Using Renesas RF-PLL and RF-Synthesizer Solutions Manual
6.1
Example 1: Phase Noise Plot from J12/J13 (122.88MHz)
Figure 7. Phase Noise Plot of 122.88MHz Output from 8V19N491-24 QREF_A2/nQREF_A2
6.2
Example 2: Phase Noise Plot from 8V97003 #1 (1GHz)
Figure 8. Phase Noise Plot of 1000MHz Output from 8V97002 #1 ROUT_A/nROUT_A
R31UH0011EU0100 Rev.1.00
Nov 26, 2021
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