Pulse Input And Counting Method - Mitsubishi Electric AJ65BT-D62 User Manual

High-speed counter module
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5. PULSE INPUT AND COUNTING METHOD

5. PULSE INPUT AND COUNTING METHOD
Pulse Input Mode
1-phase, multiplied
by one
1-phase, multiplied
by two
2-phase, multiplied
by one
2-phase, multiplied
by two
2-phase, multiplied
by four
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This chapter describes the pulse input and counting modes of the high-speed counter
module.
(1) The pulse input mode is classified into 1-phase pulse input and 2-phase pulse
input. 1-phase pulse input is subdivided into multiplication by one and
multiplication by two, whereas 2-phase pulse input covers multiplication by one,
two and four.
The following table indicates the pulse input modes and count timing.
Up counting
RY(n+1)3
(RY(n+1)A)
Down counting
RY(n+1)3
(RY(n+1)A)
Up counting
RY(n+1)3
(RY(n+1)A)
Down counting
RY(n+1)3
(RY(n+1)A)
Up counting
Down counting
Up counting
Down counting
Up counting
Down counting
(2) Even if the pulse input mode is changed, counting will start from the value at the
time the mode is changed.
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Count Timing
A
Counts a pulse on leading edge of phase
B
Phase
A
Counts a pulse on trailing edge of phase
B
Phase
A
Counts a pulse on leading and trailing edges
B
of phase
Phase
A
Counts a pulse on leading and trailing edges
B
of phase
Phase
Counts a pulse on leading edge of phase
A
Count increases in response to phase differ-
B
ence between phases
Counts a pulse on trailing edge of phase
A
Count decreases in response to phase differ-
B
ence between phases
Counts a pulse on leading and trailing edges
A
of phase
Count increases in response to phase differ-
B
ence between phases
Counts a pulse on leading and trailing edges
A
of phase
Count decreases in response to phase differ-
B
ence between phases
Counts a pulse on leading and trailing edges
A
of phases
Count increases in response to phase differ-
B
ence between phases
Counts a pulse on leading and trailing edges
A
of phases
Count decreases in response to phase differ-
B
ence between phases
5 - 1
MELSEC-A
B and RY(n+1)3 (RY(n+1)A) are off.
B or RY(n+1)3 (RY(n+1)A) is on.
A.
B and RY(n+1)3 (RY(n+1)A) are off.
A.
B or RY(n+1)3 (RY(n+1)A) is on.
A and
B.
A and
B.
A.
A and
B.
A.
A and
B.
A and
B.
A and B.
A and
B.
A and
B.
A.
A.
A.
A.

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