Quick Start; Cdce906/Cdce706 Default Setup - Texas Instruments CDCE906 User Manual

Quick Start

2 Quick Start
The device is already preprogrammed and provides a 27MHz clock at every output. A 27MHz crystal is
used as reference.
To start the measurements the following actions are required:
• Connect 3.3 V to P1, P2, P3, and GND to P4.
• Connect one of the six outputs (Y0–Y5) to an oscilloscope.
• Connect the oscilloscope to the output that will be measured.
In the Default Setup, the clock input pins CLK_IN0 and CLK_IN1 are connected to a 27-MHz crystal. All
PLLs and all outputs are active and in non-inverting mode. S0, S1, and SSC comply according the default
setting described in byte 10 and byte 25 (see the data sheet) respectively.
See Figure 2 to view the CDCE906/CDCE706 default setup.
CLK_IN0
14 pF
27-MHz
2 LVCMOS
Crystal
Differential
CLK_IN1
Input
14 pF
SO/AO/CLK_SEL
EEPROM
LOGIC
S1/A1
SMBUS
SDATA
LOGIC
SCLOCK
8 CDCE906/CDCE706 Performance Evaluation Module
f
VCO1
Divider M
1
Divider N
8
f
VCO2
XO
or
Divider M
27
or
Divider N
250
f
VCO3
Divider M
375
Divider N
3136
Figure 2. CDCE906/CDCE706 Default Setup
= 216 MHz
PLL1
PFD
Filter MUX
VCO
= 250 MHz
PLL2
w/ SSC
PFD
Filter
MUX
VCO
SSC-OFF
= 225.792 MHz
PLL3
PFD
MUX
Filter
VCO
SCAU016B – August 2006 – Revised August 2007
www.ti.com
Output Switch Matrix
Y0
P0-Div LV
CMOS
10
Y1
P1-Div
LV
CMOS
20
Y2
P2-Div LV
CMOS
8
Y3
P3-Div LV
CMOS
9
Y4
P4-Div LV
CMOS
32
Y5
P5-Div
LV
CMOS
4
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27 MHz
27 MHz
27 MHz
27 MHz
27 MHz
27 MHz