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Texas Instruments CDCE62005EVM User Manual

Texas Instruments CDCE62005EVM User Manual

Low phase noise clock evaluation module — up to 1.5 ghz

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Low Phase Noise Clock Evaluation Module — up to 1.5
1
Features
• Easy-to-use evaluation module to generate low
phase noise clocks up to 1.5 GHz
• Easy device programming via host-powered USB
port
• Rapid configuration through provided EVM Control
Software
• Can be powered from the USB port, or by an
external 3.3V power supply
• Single-ended or differential input; external crystal
can be used with on-chip oscillator
• Footprint for optional crystal filter on one output
2
General Description
The CDCE62005 is a high performance, low phase noise frequency synthesizer and jitter cleaner. It
features an on-chip PLL with dual integrated LC Voltage Controlled Oscillators (VCOs) operating from
1.75–2.35 GHz. It provides support for three manually or automatically selected inputs, and provides up to
five differential, or ten single-ended, low-jitter outputs.
The CDCE62005 supports single-ended and differential input signals, as well as providing a crystal
oscillator circuit that operates in conjunction with an external AT-cut crystal.
The CDCE62005 is programmed through an SPI interface using the supplied EVM programming graphical
user interface (GUI).
The evaluation module (EVM) demonstrates the electrical performance of the device. This
fully-assembled, factory-tested evaluation board allows complete validation of all device functions. For
optimum performance, the board is equipped with 50Ω SMA connectors and well-controlled 50Ω
impedance microstrip transmission lines.
3
Signal Path and Control
The CDCE62005 provides three selectable inputs – PRI REF, SEC REF, and AUX IN. The PRI REF and
SEC REF inputs can accept up to 1500 MHz in the fan-out mode. In the PLL mode, PRI REF and SEC
REF can accept an input at up to 500MHz from a differential signal source, or up to 250MHz from a single
SCAU024 – September 2008
Submit Documentation Feedback
Figure 1. CDCE62005EVM Evaluation Board
Low Phase Noise Clock Evaluation Module — up to 1.5 GHz
User's Guide
SCAU024 – September 2008
GHz
1

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Summary of Contents for Texas Instruments CDCE62005EVM

  • Page 1 • Single-ended or differential input; external crystal can be used with on-chip oscillator • Footprint for optional crystal filter on one output Figure 1. CDCE62005EVM Evaluation Board General Description The CDCE62005 is a high performance, low phase noise frequency synthesizer and jitter cleaner. It features an on-chip PLL with dual integrated LC Voltage Controlled Oscillators (VCOs) operating from 1.75–2.35 GHz.
  • Page 2 1.5 GHz (LVPECL). It operates as a jitter cleaner, or as a frequency synthesizer, or both. An optional single ended output (AUX OUT) provides an LVCMOS copy of either the third or fourth output. On the CDCE62005EVM the AUX OUT signal path has a footprint for an optional crystal filter (U13).
  • Page 3 Connect the USB cable to the EVM. If a box appears asking for an appropriate driver, Do not use the automatic search option! Select a manual installation and when prompted for the driver location browse to the CDCE62005EVM program file folder that was used during instillation. If Windows does not ask for a driver, no action is needed.
  • Page 4 Other configurations are selected by the software with user-selectable options as described in the steps below. If the CDCE62005EVM is USB powered, the “Enable EVM Power” check box must be checked. If the CDCE62005 is powered from an external source, the “Enable EVM Power” check box must be unchecked.
  • Page 5 Installing the EVM Control Software and USB Driver www.ti.com 1. Primary/Secondary Reference The primary or the secondary reference input buffer section on the EVMCS can be clicked for a popup window that opens, as shown in Figure 3, showing selections on the external input signal type (differential or single ended), the external signal connection to the CDCE62005 primary/secondary inputs (AC or DC termination), input-buffer internal termination (enabled or disabled), and the input-buffer VBB voltage polarity (normal or inverted).
  • Page 6 External Loop Filter Components” button and by enabling the appropriate DIPswitches (SW9 and SW10) on the bottom of the CDCE62005EVM as described in the “Configuring the Board” section of this User’s Guide. The external loop filter components (C4, R4 and C5) are in green in the picture displayed below.
  • Page 7 Installing the EVM Control Software and USB Driver www.ti.com Figure 7. Loop Filter, Additional External Components 5. Output MUX Selection The Output MUX section of the EVMCS for each of the five outputs can be clicked to open a popup window, shown in Figure 8, showing each Output MUX clock source.
  • Page 8 Configuration for Programming and Testing (with USB cable attached) (Default Configuration) The CDCE62005EVM is configured by default to operate with the USB cable attached and a 3.3V power supply added to EXT VDD and GND. In this configuration the USB microcontroller is powered by the USB port 5V supply, while the CDCE62005 is powered by the 3.3V external supply.
  • Page 9 The CDCE62005 PLL lock detect can be chosen on the CDCE62005EVM as either an analog lock detect or a digital lock detect using the jumper, JP_3_12, located at the back side of the CDCE62005EVM. This jumper can be configured as shown in Figure 12 for either analog or digital lock detect.
  • Page 10 CDCE62005EVM Board Schematic Diagram www.ti.com CDCE62005EVM Board Schematic Diagram Low Phase Noise Clock Evaluation Module — up to 1.5 GHz SCAU024 – September 2008 Submit Documentation Feedback...
  • Page 11 CDCE62005EVM Board Schematic Diagram www.ti.com SCAU024 – September 2008 Low Phase Noise Clock Evaluation Module — up to 1.5 GHz Submit Documentation Feedback...
  • Page 12 CDCE62005EVM Board Schematic Diagram www.ti.com Low Phase Noise Clock Evaluation Module — up to 1.5 GHz SCAU024 – September 2008 Submit Documentation Feedback...
  • Page 13 CDCE62005EVM Board Schematic Diagram www.ti.com SCAU024 – September 2008 Low Phase Noise Clock Evaluation Module — up to 1.5 GHz Submit Documentation Feedback...
  • Page 14 CDCE62005EVM Board Schematic Diagram www.ti.com Low Phase Noise Clock Evaluation Module — up to 1.5 GHz SCAU024 – September 2008 Submit Documentation Feedback...
  • Page 15: Evaluation Board/Kit Important Notice

    EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
  • Page 16 CDCE62005EVM Board Schematic Diagram www.ti.com EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of 3 V to 3.6 V and the output voltage range of 0 V to 3.6 V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power.
  • Page 17: Important Notice

    IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.