Texas Instruments CDC7005 User Manual
Texas Instruments CDC7005 User Manual

Texas Instruments CDC7005 User Manual

Bga package evaluation module high performance analog/cdc

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CDC7005 (BGA Package)
Evaluation Module Manual
High Performance Analog/CDC
User's Guide
2005
Clock Drivers
SCAU005C

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Summary of Contents for Texas Instruments CDC7005

  • Page 1 CDC7005 (BGA Package) Evaluation Module Manual High Performance Analog/CDC User’s Guide 2005 Clock Drivers SCAU005C...
  • Page 2 TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:...
  • Page 3 EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods.
  • Page 4 EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2004, Texas Instruments Incorporated...
  • Page 5 Read This First About This Manual This manual explains how to use the CDC7005 evaluation module and to pro- vide the guidelines to build the customer’s own systems. The manual includes schematics, layout, bill of materials, and a software description.
  • Page 7: Table Of Contents

    ..............CDC7005 Functional Block Diagram .
  • Page 8 ....... . 5−3 CDC7005 With an Active Loop Filter Using a CDC7005 Integrated OPA ....
  • Page 9: Introduction

    Loop bandwidth can be selected as low as 10 Hz or less, allowing this device to clean the system’s clock jitter. The CDC7005 can be used as a simple 1:5 LVPECL buffer with output dividing options.
  • Page 10: Cdc7005 Functional Block Diagram

    CDC7005 Functional Block Diagram 1.1 CDC7005 Functional Block Diagram OPA_IN − OPA_OUT OPA_IP STATUS_REF STATUS_VCXO STATUS_LOCK HOLD REF_IN Prgm Divider Prgm Delay LVCMOS Input CP_OUT Charge Pump Prgm Divider Prgm Delay CTRL_LE I_REF SPI LOGIC Reference CTRL_DATA CTRL_CLK PECL-TO- LVTTL...
  • Page 11: Quick Start

    After power up, D1 is on if there is a valid reference clock and D2 is on if there is a valid VCXO clock for the CDC7005. If the reference clock and VCXO clocks are phase locked, D3 is on.
  • Page 13: Evm Hardware

    Chapter 3 EVM Hardware This chapter discusses the EVM hardware. Topic Page Board View and Connector Location ......Connector Description .
  • Page 14: Board View And Connector Location

    Board View and Connector Location 3.1 Board View and Connector Location Figure 3−1. Board View...
  • Page 15: Connector Description

    Connector Description 3.2 Connector Description Table 3−1. Connectors, Switches, and Indicators Reference Description Power supply 3.3 V Status outputs (STATUS_LOCK, STATUS_VCXO, STATUS_REF) J6, J7 Y0/Y0B PECL differential output J8, J9 Y1/Y1B PECL differential output J10, J11 Y2/Y2B PECL differential output J12, J13 Y3/Y3B PECL differential output J14, J15...
  • Page 16: Power Supply (P1, P2)

    Push SW2 to enter the reset mode of the device. Then the dividers (M, N, and P) are reset to default. The three status outputs of the CDC7005 are fed to LED indicators and to pin header J5. An D1 on condition indicates a valid reference input clock signal, D2 is on if the VCXO input clock is valid, and D3 turns on if PLL has been locked.
  • Page 17: Loop Filter (J29−J35)

    1−2 3.3.5 High-Speed Outputs and Inputs (J6−J15 and J19−J20) The CDC7005 drives five differential LVPECL outputs. All PECL outputs are ac-coupled and terminated with 150 Ω to GND. This is in contrast to typical LVPECL termination, which requires V − 2 V as termination voltage. The reason is to simplify the power supply scheme.
  • Page 18: Vcxo Inputs And Outputs (J23−J28)

    3.3.6 VCXO Inputs and Outputs (J23−J28) The CDC7005 requires an external VCXO in order to complete the PLL loop. The VCXO adjusts the frequency and phase depending on the control voltage level coming from loop filter and provide the input clock to the LVPECL block.
  • Page 19: Serial Peripheral Interface (Spi) Software

    Chapter 4 Serial Peripheral Interface (SPI) Software This chapter discusses the serial peripheral interface software. Topic Page Functional Description ........Software Installation .
  • Page 20: Functional Description

    4.1 Functional Description Programming software is required for programming the internal control register of the CDC7005 in the EVM. The software runs under Windows98, NT, and 2000. A quick installation is required prior to use. See Section 4.2 Software Installation.
  • Page 21: Software Installation

    1) Run program setup.exe in folder Software\Programming Software 2) Run program setup.exe in folder Software\Parallel Port Access 3) Reboot the computer 4) Run the software from Start −> Programs −> CDC7005 SPI −> CDC7005 SPI EVM Serial Peripheral Interface (SPI) Software...
  • Page 23: Application Level Circuit Diagram

    Chapter 5 Application Level Circuit Diagram This chapter discusses the application level circuit diagram. Topic Page Application Level Circuit Diagram ......Application Level Circuit Diagram...
  • Page 24: Cdc7005 With A Passive Loop Filter Configuration

    The passive loop filter is a second order filter (two poles, one zero). The zero is required for the overall loop stability. R1, C1, and C2 generate the dominant pole of the system. A second pole is introduced by R2 and C3. Figure 5−1. CDC7005 With a Passive Loop Filter Configuration Low-Pass Filter VCXO 245.76 MHz;...
  • Page 25: Cdc7005 With An Active Loop Filter Using A Cdc7005 Integrated Opa

    Application Level Circuit Diagram Figure 5−2. CDC7005 With an Active Loop Filter Using a CDC7005 Integrated OPA VCXO 245.76 MHz; Gain = 26.5kHz/V Low-Pass Filter PECL_OUT_B V_CTRL PECL_OUT 100 nF 10 KΩ CDC7005 10 µF 4.7 KΩ 10 KΩ REF_IN...
  • Page 26: Cdc7005 With An Active Loop Filter Using Opa341

    Application Level Circuit Diagram 5.1.3 Active Loop Filter—External Operational Amplifier Figure 5−3. CDC7005 With an Active Loop Filter Using OPA341 Low-Pass Filter VCXO 245.76 MHz; Gain = 26.5kHz/V 10 KΩ PECL_OUT_B V_CTRL PECL_OUT 100 nF 10 µF CDC7005 10 KΩ...
  • Page 27: Parts List, Board Layouts, And Schematics

    Chapter 6 Parts List, Board Layout, and Schematic This chapter contains the parts list, board layout, and schematic for the CDC7005 EVM. Topic Page Parts List ........... . .
  • Page 28: Parts List

    Parts List 6.1 Parts List Item Qty Reference Designator Part Part Number Note C14, C15, C78 22 µF, 16 V 20% Panasonic ECS−T1CC226R tantalum TE SMD C16, C64, C65, C79 10 µF, 16 V TANT Panasonic ECS−H1CC106R TEH SER SMD C17, C80, C35, C55 0.1 µF, 16 V ceramic Yageo 04022F104Z7B20D...
  • Page 29 Parts List J29, J30, J32, J33, J34 NU HDR Not used (header 3 pos, J29, J34 0.100 ctr) pin 1−3 shorted Jumper wire, 00.1” 3M/ESD 923345−01−C To short pin long 1 and 3 of J29, J34 Item Qty Reference Designator Part Part Number Note...
  • Page 30 Parts List T point PC WHT Keystone Elec 5012 CDC7005ZVA Texas Instruments CDC7005ZVAT...
  • Page 31 Parts List Item Qty Reference Designator Part Part Number Note SN74LV125 Texas Instruments SN74LV125AD OPA341 Texas Instruments OPA341UA VCXO1 VCXO_6 Toyocom VCXO Stand off Legs for Screw Legs for Parts List, Board Layout, and Schematic...
  • Page 32: Board Layout

    Parts List 6.2 Board Layout Figure 6−1. Component View and Silkscreen Y3B Y3...
  • Page 33: Top Layer View

    Parts List Figure 6−2. Top Layer View Parts List, Board Layout, and Schematic...
  • Page 34: Bottom Layer View

    Parts List Figure 6−3. Bottom Layer View...
  • Page 35: Ground Plane View

    Parts List Figure 6−4. Ground Plane View Parts List, Board Layout, and Schematic...
  • Page 36: Schematic

    Parts List Figure 6−5. Power Layer View 6.3 Schematic The following page contains the schematic for the CDC7005. 6-10...
  • Page 37 C32 10n 100n 100n PARALLEL PORT PWR_IN 50 OHM @ 100MHZ PWR_IN 100n 100n GREEN 1.5K 22uF 100n 100n 100n AVCC 22uF 100n Title CDC7005 Evaluation Module Size Document Number R e v CDC7005EVM-SCH Date: Friday, September 10, 2004 Sheet...

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