Cdce906/Cdce706 Functional Block Diagram - Texas Instruments CDCE906 User Manual

Performance evaluation module
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Introduction
The device supports non-volatile EEPROM programming for easy customized applications. It is
pre-programmed with a factory default configuration (see
different application configuration before it goes onto the PCB or re-programmed by in-system
programming. A different register setting is programmed via the serial SMBus interface.
Two free programmable inputs, S0 and S1, can be used to control for each application the most
demanding logic control settings (outputs disable to low, outputs 3-state, power down, PLL bypass, etc).
The CDCE906/CDCE706 has three power supply pins, VCC, VCCOUT1, and VCCOUT2. VCC is the
power supply for the device. It operates from a single 3.3-V supply voltage. VCCOUT1 and VCCOUT2 are
the power supply pins for the outputs. VCCOUT1 supplies the outputs Y0 and Y1 and VCCOUT2 supplies
the outputs Y2, Y3, Y4, and Y5. Both outputs supplies can be 2.3 V to 3.6 V. The output works even at
1.7V VCCOUT. However, some limitations apply at VCCOUT below 2.3V.
The CDCE906/CDCE706 is characterized for operation from 0°C to 70°C/–40°C to 85°C.
CLK_IN0
2 LVCMOS
Differential
CLK_IN1
Input
SO/AO/CLK_SEL
S1/A1
EEPROM
SDATA
LOGIC
SCLOCK
Factory Prg.
6
CDCE906/CDCE706 Performance Evaluation Module
V
CC
prg. 9 Bit
Divider M
prg. 12 Bit
Divider N
XO
or
prg. 9 Bit
Divider M
or
prg. 12 Bit
Divider N
prg. 9 Bit
Divider M
prg. 12 Bit
Divider N
Figure 1. CDCE906/CDCE706 Functional Block Diagram
Figure
2) and can be re-programmed to a
GND
PLL Bypass
PLL1
PFD
Filter
MUX
VCO
PLL2
w/ SSC
PFD
MUX
Filter
VCO
SSC
PLL3
PFD
MUX
Filter
VCO
GND
SCAU016B – August 2006 – Revised August 2007
www.ti.com
V
CCOUT1
Output Switch Matrix
LV
CMOS
LV
CMOS
LV
CMOS
LV
CMOS
LV
CMOS
LV
CMOS
V
CCOUT2
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Y0
Y1
Y2
Y3
Y4
Y5

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