Evaluation Board User Guide
EVALUATION BOARD SOFTWARE: QUICK START PROCEDURES
This section provides quick start procedures for using the AD911x
or AD971x. Both the default and optional settings are described.
CONFIGURING THE BOARD
Before using the software for testing, configure the evaluation
board as follows:
1.
Connect the evaluation board to the DPG2 evaluation
board.
2.
Connect the AD911x or AD971x evaluation board to the
PC with a USB cable (ConnectorXP2 USB/BRD PWR).
The LED XD1 should turn on. If it does not turn on, refer
to the Power Circuitry section and configure the board
with the default setting.
3.
Connect a clean signal generator with low phase noise to
provide an input signal to the clock distribution source
input, J10. Use a 1 m, shielded, RG-58, 50 Ω coaxial cable
to connect the signal generator.
USING THE SOFTWARE FOR TESTING
Set Up the DPG2 Software
After configuring the board, set up the DPG2 by following
these steps:
1.
Open DPGDownloader (Start > Programs > Analog
Devices > DPG > DPGDownloader).
The program should automatically recognize and display
the evaluation board, such as the AD9717 used in this
example, in the drop-down menu for the Evaluation
Board, as shown in Figure 3
2.
Select LVCMOS-3.3V (DCO) for the Port Configuration
as the DPG2 data clock input, also shown in Figure 3.
Figure 3. DPG2 Board Configuration
3.
Open the AD911x or AD971x SPI software (Start >
Programs > Analog Devices > AD9717 > AD971x SPI).
4.
Select the clock dividers for the data clock going to the
DPG2, and for the clock going to the DAC. The divider
ratio for the DAC clock should be double the ratio for the
data clock as shown in Figure 4.
The clock going to the DAC should be no greater than
125 MHz. When the AD9512 configuration is complete,
verify the clock frequency output to the DPG2 in
Figure 3. The frequency displayed represents the frequency
of the clock sent to the DPG2. It should be no greater than
250 MHz.
5.
In the DPG2 window (see Figure 5), select Add Generated
Waveform, and then select Single Tone. A single tone
panel is added to the vector list. Enter a clock frequency of
125 MHz for Data Clock Frequency.
Note that this frequency is half of the frequency in Figure 3
for Data Clock Frequency as the data clock sent to the
DPG2 is twice the rate of the DAC. However, the vector
generation is done using the DAC clock (data clock/2) (see
Figure 4).
6.
Make the following entries:
•
Enter 10 MHz as the Desired Frequency of the tone.
•
The DAC Resolution should be set at the resolution
of the IC selected (14 bits for the
AD9117, 12 bits for the
so on).
•
Keep Record Length at 16384
•
The digital scaling back of the tone can be done by
changing the Amplitude (defaults to 0 dB).
•
Ensure that Unsigned Data and Generate Complex
Data (I & Q) are selected.
See Figure 5 for the appropriate settings.
7.
In the lower portion of the screen, select 1I / 1Q: Single
Tone as the Data Vector, choosing the appropriate in-
phase and quadrature data for the I and Q vectors, shown
in Figure 6. The other options can be left at their default.
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Figure 4. AD9512 Clock Divider Setting
AD9717
AD9716
and AD9116, and
Figure 5. Single Tone Generation
UG-073
and
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