Esd Caution - Analog Devices AD911 Series User Manual

UG-073
With a clock signal source of 250 MHz, the SPI DATACLK
divide ratio is set to 2 (f = 125 MHz) and the DATACLK
DAC
divide ratio is set to 1 (f = 250 MHz). These settings, which
DATA
are due to the interleaved data input format, allow the data to be
properly allocated to each DAC.
Set these settings in the SPI software front panel and then select
Run. The readback for the SPI software is shown along the
right-hand side of the window and can be checked for accuracy

ESD CAUTION

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REF –8dBm #ATTEN 24dB
#PEAK
LOG
10
1
dB/
LG AV
20
W1 S2
START 0Hz
VBW 30kHz
#RES BW 30kHz
MARKER TRACE TYPE
1 (1) FREQ
2 (1) FREQ
Figure 9. DAC Output Spectrum
UG08698-0-3/10(0)
Rev. 0 | Page 12 of 12
Evaluation Board User Guide
when debugging. After the DPG2 and SPI software setups are
completed and run, Figure 9 shows the spectrum that should be
observed on the analyzer.
The fundamental is present at about 20 MHz and the folded
image (f
– f ) is also visible, however it is easily filtered
DAC OUT
with a low-pass filter before modulation.
2
EXT REF
DC COUPLED
STOP 130.00MHz
SWEEP 174.2ms (601 PTS)
X AXIS AMPLITUDE
19.93MHz –16.25dBm
105.08MHz –33.15dBm