Reset by STOP2 mode release
When RESET_N pin changed "Low" or LVD reset occurred during STOP2 mode, STOP2 released. The power
supply is turned on and assert reset to Main Power Domain. After RESET_N pin changes to "High" or LVD reset
released, start operate in NORMAL mode. At that time, condition of CPU is as same as cold reset except
[RLMLOSCCR], [RLMRSTFLG0], [RLMRSTFLG1].
When asserted interrupt request during STOP2 mode, also STOP2 released. The power supply is turned on and
assert reset to Main Power Domain in the sequence of releasing STOP2 mode. Refer to the reference manual
"Clock Control and Operation Mode" for the operation at the time of STOP2 release.
Starting in reset and single boot mode
For the details of the single mode, refer to the reference manual "Flash memory".
Start-up by RESET_N Pin Signal
When "Low" is inputted to a BOOT_N pin, reset release, "single boot mode" will be started.
When turn on power supply, input "Low" to the RESET_N pin longer than "Internal initialization time" to reset.
And deassert RESET_N pin to "High", after a supply voltage goes up into an operating voltage range.
DVDD3= DVDD3A= DVDD3B= DVDD3C= DVDD3D= DVDD3E= DVDD3F= DVDD3G= DVDD3H= AVDD3
Operating Voltage range
LVD Release
Voltage
(V
)
LVL0
POR release
Voltage
(V
)
PREL
0V
RESET_N pin
LVD reset
Internal reset
Control internal
Pull-up of
OFF
BOOT_N pin
BOOT_N pin
Low level input
Single Boot
Mode
Figure 3.6 Starting in power supply is on and single boot mode
Power on rising gradient
(V
)
PON
LVD detection release time(t
VDDT2
t
Internal initilization time(
)
IINIT
ON
80 / 88
Clock Control and Operation Mode
CPU Operation
)
t
CPU waiting time(
CPUWT
OFF
Open
Single boot mode
TXZ+ Family
TMPM4G Group(1)
DVDD3
start
)
2021-06-30
Rev. 1.1