[CGFCEN]
Table 1.17 [CGFCEN] register corresponding to each product
Bit
Bit Symbol
31
FCIPEN31
30
FCIPEN30
29
FCIPEN29
28
FCIPEN28
27
FCIPEN27
26
FCIPEN26
25
FCIPEN25
24
FCIPEN24
23
FCIPEN23
22
FCIPEN22
21
FCIPEN21
20
FCIPEN20
19
FCIPEN19
18
FCIPEN18
17
FCIPEN17
16
FCIPEN16
15
FCIPEN15
14
FCIPEN14
13
FCIPEN13
12
FCIPEN12
11
FCIPEN11
10
FCIPEN10
9
FCIPEN09
8
FCIPEN08
7
FCIPEN07
6
FCIPEN06
5
FCIPEN05
4
FCIPEN04
3
FCIPEN03
2
FCIPEN02
1
FCIPEN01
0
FCIPEN00
Internal connection
Channel No./
peripheral circuit
Port name
-
-
-
-
DNF
-
-
OFD
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
54 / 88
Clock Control and Operation Mode
M4GR
M4GQ
x
-
x
-
x
-
x
-
B
A
x
-
x
-
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
x
-
TXZ+ Family
TMPM4G Group(1)
M4GN
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
2021-06-30
Rev. 1.1