3.2.3. Reset by STOP2 mode release
When RESET_N pin is changed to "Low" or LVD reset occurred during STOP2 mode, STOP2 released. The
power supply is turned on and assert reset to Main Power Domain. After RESET_N pin is changed to "High" or
LVD reset is released, start operation in NORMAL mode. At that time, condition of CPU is as same as cold reset
except [RLMLOSCCR], [RLMRSTFLG0], [RLMRSTFLG1].
When asserted interrupt request during STOP2 mode, also STOP2 released. The power supply is turned on and
assert reset to Main Power Domain in the sequence of releasing STOP2 mode. Refer to the reference manual
"Clock Control and Operation Mode" for the operation at STOP2 releasing.
3.2.4. Starting in reset and single boot mode
When "Low" is input to a BOOT_N pin, and then reset release, "single boot mode" will be started.
When turn on power supply, the time of input "Low" to the RESET_N pin is equal to or longer than "Internal
initialization time" to reset. And deassert RESET_N pin to "High", after a supply voltage goes up into an operating
voltage range.
Refer to the reference manual "Flash Memory" for the details of "Single Boot Mode".
Operation Voltage range
LVD Release
Voltage
(V
)
LVL0
POR release
Voltage
(V
)
PREL
0V
RESET_N pin
LVD reset
Internal reset
Control internal
Pull-up of
BOOT_N pin
BOOT_N pin
Single Boot
Mode
Figure 3.6 Starting in power supply is on and single boot mode
Power on rising gradient
(V
PON
LVD detection release time(t
Internal initilization time(
OFF
Low level input
Clock Control and Operation Mode
)
)
VDDT2
t
)
IINIT
ON
66 / 72
TXZ+ Family
TMPM3H Group(1)
DVDD5 = DVDD5A = DVDD5B = AVDD5
CPU Operation
start
t
CPU waiting time(
)
CPUWT
OFF
Open
Single boot mode
DVDD5
2022-05-10
Rev. 1.3