Toshiba TXZ+ Series Reference Manual page 45

Bit Bit Symbol
7 IPMENB07
6 IPMENB06
5 IPMENB05
4 IPMENB04
3 IPMENB03
2 IPMENB02
1 IPMENB01
0 IPMENB00
Note1: Even if the initial value of the register is set to stop of the clock, the clock is supplied during the reset.
Note2: Write "0" for bit of function that does not exist in TMPM4GQ and TMPM4GN. Refer to "1.5. Information
according to product" for detail.
After
Type
reset
Clock enable of PORT F
0 R/W 0: Clock stop
1: Clock supply
Clock enable of PORT E
0 R/W 0: Clock stop
1: Clock supply
Clock enable of PORT D
0 R/W 0: Clock stop
1: Clock supply
Clock enable of PORT C
0 R/W 0: Clock stop
1: Clock supply
Clock enable of PORT B
0 R/W 0: Clock stop
1: Clock supply
Clock enable of PORT A
0 R/W 0: Clock stop
1: Clock supply
Clock enable of I
0 R/W 0: Clock stop
1: Clock supply
Clock enable of I
0 R/W 0: Clock stop
1: Clock supply
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Clock Control and Operation Mode
Function
2 C ch4
2 C ch3
TXZ+ Family
TMPM4G Group(1)
2021-06-30
Rev. 1.1