Advantech ITA-1710 User Manual page 72

A.1 Programming the Watchdog Timer
The ITA-1710's watchdog timer can be used to monitor system software operation
and take corrective action if the software fails to function within the programmed
period. This section describes the operation of the watchdog timer and how to pro-
gram it.
A.1.1 Watchdog Timer Overview
The watchdog timer is built into the super I/O controller SMSC SCH3114. It provides
the following user-programmable functions:
 Can be enabled or disabled via user program
 Timer can be set from 1 to 255 seconds or 1 to 255 minutes
 Generates an interrupt or resets signal if the software fails to reset the timer
before time-out
A.1.2 Programming the Watchdog Timer
The I/O port address of the watchdog timer is A00h (hex).
Table A.1: Watchdog Timer Registers
Address: A00h (hex)
Register Shift Read/Write
65 (hex)
66 (hex)
67 (hex)
68 (hex)
ITA-1710 User Manual
Description
Set seconds or minutes as units for the timer.
write Write 0 to bit 7: set second as counting unit. [default]
Write 1 to bit 7: set minutes as counting unit.
0: Stop timer [default]
01~FF (hex): The amount of the count, in seconds or min-
utes, depends on the value set in register 65 (hex). This
write number decides how long the watchdog timer waits for
strobe before generating an interrupt or reset signal. Writing
a new value to this register can reset the timer to count with
the new value.
Configure watchdog timer
Bit 1:Write 1 to enable keyboard to reset the timer, 0 to dis-
able. [default]
Bit 2: Write 1 to enable mouse to reset the timer, 0 to dis-
able.[default]
Bit 7~4: Set the interrupt mapping of watchdog timer:
read/write
1111=IRQ15
......
0011=IRQ3
0010=IRQ2
0001=IRQ1
0000=Disable [default]
Control watchdog timer
Bit0: Read watchdog state; 1=Timer timeout
Bit2: Write 1 to immediately generate timeout signal, and
read/write
automatically return to 0 (Write only).
Bit3: Writer 1 to allow triggering of timer timeout when P20
is effective, 0 to disable. [default]
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