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1.3
Functional Block Diagram
The McBSP consists of a data path and control path, as shown in
MCBSP_DR
MCBSP_DX
MCBSP_CLKX
MCBSP_CLKR
MCBSP_FSX
MCBSP_FSR
MCBSP_CLKS
1.4
Industry Standard Compliance Statement
The McBSP supports the following industry standard interfaces:
AC97— The AC97 standard specifies a 5-wire digital serial link between an audio codec device and its
digital controller.
IIS— IIS is a protocol for transmitting two channels of digital audio data over a single serial connection.
The IIS bus is an industry standard three-wire interface for streaming stereo audio between
devices, typically between an ARM and a DAC/ADC.
SPRUFI3A – March 2009 – Revised August 2009
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Figure 1. McBSP Block Diagram
McBSP
Compand
RSR
RBR
Expand
Compress
XSR
Clock and
frame sync
generation
and control
Multichannel
selection
TMS320DM36x Multichannel Buffered Serial Port (McBSP) Interface
Copyright © 2009–2009, Texas Instruments Incorporated
Figure 1
DRR
DXR
SPCR
RCR
XCR
SRGR
PCR
MCR
RCER
XCER
RINT
Interrupts
to CPU
XINT
REVT
Synchronization
events to DMA
XEVT
Introduction
32-bit
peripheral
bus
11
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