Swj Debug Port Connection With Standard Jtag Connector; Figure 24. Jtag Connector Implementation - ST STM32F4 Series Getting Started

Debug management
To avoid any uncontrolled I/O levels, the STM32F4xxxx embeds internal pull-up and pull-
down resistors on JTAG input pins:
•
JNTRST: Internal pull-up
•
JTDI: Internal pull-up
•
JTMS/SWDIO: Internal pull-up
•
TCK/SWCLK: Internal pull-down
Once a JTAG I/O is released by the user software, the GPIO controller takes control again.
The reset states of the GPIO control registers put the I/Os in the equivalent state:
•
JNTRST: Input pull-up
•
JTDI: Input pull-up
•
JTMS/SWDIO: Input pull-up
•
JTCK/SWCLK: Input pull-down
•
JTDO: Input floating
The software can then use these I/Os as standard GPIOs.
Note: The JTAG IEEE standard recommends to add pull-up resistors on TDI, TMS and nTRST but
there is no special recommendation for TCK. However, for the STM32F4xxxx, an integrated
pull-down resistor is used for JTCK.
Having embedded pull-up and pull-down resistors removes the need to add external
resistors.
6.3.4

SWJ debug port connection with standard JTAG connector

Figure 24
connector.
34/44
shows the connection between the STM32F4xxxx and a standard JTAG

Figure 24. JTAG connector implementation

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