Quectel 5G Module Series Hardware Design page 22

5 GND
FULL_CARD_
6
POWER_OFF#
7 USB_DP
8 W_DISABLE1#
9 USB_DM
10 WWAN_LED#
11 GND
12 Notch
13 Notch
14 Notch
15 Notch
16 Notch
17 Notch
18 Notch
19 Notch
20 PCM_CLK
21 CONFIG_0
22 PCM_DIN
23 WAKE_ON_WAN#
24 PCM_DOUT
25 DPR*
26 W_DISABLE2#
RM500Q-AE&RM502Q-AE_Hardware_Design
Ground
Turn on/off the module.
DI, PD High level: Turn on
Low level: Turn off
USB 2.0 differential data
AIO
(+)
Airplane mode control.
DI, OD
Active LOW
USB 2.0 differential data
AIO
(-)
RF status indication
DO, OD LED.
Active LOW
Ground
Notch
Notch
Notch
Notch
Notch
Notch
Notch
Notch
DIO, PD PCM data bit clock
DO Not connected internally
DI, PD PCM data input
Wake up the host.
DO, OD
Active LOW
DO, PD
PCM data output
Dynamic power
DI, PU reduction.
High level by default.
GNSS disable control.
DI, OD
Active LOW
RM500Q-AE&RM502Q-AE Hardware Design
V max = 4.4 V
IH
V min = 1.19 V
IH
V max = 0.2 V
IL
1.8/3.3 V
VCC
1.8 V
1.8 V
1.8/3.3 V
1.8 V
1.8 V
1.8/3.3 V
5G Module Series
Internally pulled
down with a 100
kΩ resistor.
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