Modem/Terminal And Computer Requirements; Sd Addresses - Campbell Measurement and Control Module CR10 Operator's Manual

SECTION 6. 9-PIN SERIAL INPUT/OUTPUT
State 2 requires all SDs to drop the Ring line
and prepare for addressing. The CR10 then
synchronously clocks 8 bits onto TXD using
CLK/HS as a clock. The least significant bit is
transmitted first and is always logic high. Each
bit transmitted is stable on the rising edge of
CLK/HS. The SDs shift in bits from TXD on the
rising edge of CLK/HS provided by the CR10.
The CR10 can only address one device per
State 2 cycle. More than one SD may respond
to the address, however. State 2 ends when
the 8th bit is received by the SD.
SDs implemented with shift registers decode
the 4 most significant bits (bits 4, 5, 6, and 7)
for an address. Bit 0 is always logic high. Bits
1, 2, and 3 are optional function selectors or
commands. Addresses established to date are
shown in Table 6.6-1 and are decoded with
respect to the TXD line.
TABLE 6.6-1. SD Addresses
B7 B6 B5 B4 B3 B2 B1 B0
SDC99 Printer 0 0
Storage Module 0 0
CR10 Keyboard 0 0
CR10 Display 0 0
Cr10 RF Modem 0 0
EPROM Storage 0 1
Module
STATE 3, the SD Active State
The SD addressed by State 2, enters State 3.
All other SDs enter State 4. An active SD
returns to State 1 by resetting itself, or by the
CR10 forcing it to reset.
Active SDs have different acknowledgment and
communication protocols. Once addressed, the
SD is free to use the CLK/HS, TXD, and RXD
lines according to its protocol with the CR10.
The CR10 may also pulse the SDE line after
addressing, as long as the CLK/HS and SDE
are not low at the same time.
STATE 4, the SD Inactive State
The SDs not addressed by State 2 enter State
4, if not able to reset themselves (e.g., SM192
Storage Module). Inactive SDs ignore data on
the TXD line and are not allowed to use the
6-6
0 0 X X X 1
0 1 X X X 1
1 0 0 X X 1
1 0 1 X X 1
1 1 X X X 1
0 0 X X X 1
CLK/HS or RXD lines. Inactive SDs may raise
the Ring line to request service.
STATE 5
State 5 is a branch from State 1 when the SDE
line is high and the CLK/HS line is low. The
SDs must drop the Ring line in this state. This
state is not used by SDs. The CR10 must force
the SDs back to the reset state from State 5
before addressing SDs.
STATE 6
State 6 is a branch from State 1, like State 5,
except the SDE line is low and the CLK/HS line
is high. The SDs must drop the Ring line in this
state.
6.7 MODEM/TERMINAL AND
COMPUTER REQUIREMENTS
6.7.1 SC32A INTERFACE
The CR10 considers any device with an
asynchronous serial communications port
which raises the Ring line (and holds it high
until the ME line is raised) to be a modem
peripheral. Modems include Campbell
Scientific phone modems, and most computers,
terminals, and modems using the SC32A
Optically Isolated RS232 Interface.
Most modem and print peripherals require the
SC32A Optically Isolated RS232 Interface. The
SC32A raises the CR10's ring line when it
receives characters from a modem, and
converts the CR10's logic levels (0 V logic low,
5V logic high) to RS232 logic levels.
The SC32A 25-pin port is configured as Data
Communications Equipment (DCE) (see Table
6.7-1) for direct connection to Data Terminal
Equipment (DTE), which includes most PCs
and printers. For connection to DCE devices
such as modems and some computers, a null
modem cable is required.
When the SC32A receives a character from the
terminal/computer (pin 2), 5 V is applied to the
datalogger Ring line (pin 3) for one second or
until the Modem Enable line (ME) goes high.
The CR10 waits approximately 40 seconds to
receive carriage returns, which it uses to
establish baud rate. After the baud rate has
been set the CR10 transmits a carriage return,
line feed, "*", and enters the Telecommunica