Analog Devices ADRV9001 User Manual page 172

UG-1828
Table 71. adi_adrv9001_GainControlCfg_t Structure Definition
Parameter
peakWaitTime
maxGainIndex
minGainIndex
gainUpdateCounter
attackDelay_us
slowLoopSettlingDelay
lowThreshPreventGainInc
changeGainIfThreshHigh
agcMode
resetOnRxon
resetOnRxonGainIndex
enableSyncPulseForGainCounter
enableFastRecoveryLoop
power
peak
extLna
Description
Number of gain control clock cycles to wait before enabling
peak detectors after a gain change.
Maximum gain index allowed. Must be greater than
minGainIndex and be a valid gain index.
Minimum gain index allowed. Must be less than
maxGainIndex and be a valid gain index.
Is used as a decision period, with the detectors reset on this
period. Gain changes in AGC mode can also be synchronized
to this period (the expiry of this counter). The full period is a
combination of the gainUpdateCounter and
slowLoopSettlingDelay and a number of AGC cycles.
The duration the AGC should be held in reset when the Rx
path is enabled.
Number of AGC clock cycles to wait after a gain change
before the AGC will change gain again.
Only relevant in Peak and Power Detect AGC operation.
1: If AGC is in Peak and Power Detect Mode, then gain
increments requested by the power detector are prevented if
there are sufficient peaks (APD/HB Low Threshold Exceeded
Count) above the apdLowThresh or
hbUnderRangeHighThresh.
0: apdLowThresh and hbUnderRangeHighThresh are don't
cares for gain recovery.
Applicable in both peak and peak and power detect modes.
0: Gain changes will wait for the expiry of the gain update
counter if a high threshold count has been exceeded on
either the APD or HB detector.
1: Gain changes will occur immediately when initiated by HB.
Gain changes initiated by the APD will wait for the gain
update to expire.
2: Gain changes will occur immediately when initiated by
APD. Gain changes initiated by HB will wait for the gain
update to expire.
3: Gain changes will occur immediately when initiated by
APD or HB detectors.
1: AGC in Peak AGC mode, power-based gain changes are
disabled.
0: AGC in Peak and Power AGC mode where both Peak
Detectors and Power Detectors are used.
1: AGC state machine is reset when Rx is disabled. The AGC
gain setting will use the "resetOnRxonGainIndex" after
resuming the operation.
0: AGC state machine maintains its state when Rx is disabled
and the last AGC gain index will be used after resuming the
operation.
The AGC index to start with when "resetOnRxon" is set as 1.
1: Allows synchronization of AGC Gain Update Counter to the
time-slot boundary. GPIO setup required.
0: AGC Gain Update Counter free runs.
1: Enables the fast recovery AGC functionality using the HB
overload detector. Only applicable in Peak Detect Mode.
0: AGC fast recovery is not enabled.
Structure containing all the power detector settings.
Structure containing all the peak detector settings.
Structure containing all external LNA settings
Rev. PrC | Page 172 of 338
Preliminary Technical Data
Max
Min Value Value
0 31
195 255
195 255
Depends on 4194303
Overload
AGC_CLK
Detector
Cycles
Settings
0 63
0 127
0 1
0 3
0 1
0 1
195 255
0 1
0 1
N/A N/A
N/A N/A
N/A N/A
Default
Value
4
255
195
11520
10
16
0
3
1
0
255
0
0
N/A
N/A
N/A