Adrv9001 In 1T1R Fdd With Dpd Type Application - Analog Devices ADRV9001 User Manual

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ADRV9001 IN 1T1R FDD WITH DPD TYPE APPLICATION

ANTENNA
A
COUPLER
ATTENUATOR
DUPLEXER
B
RF I/O FUNCTIONALITY
Rx1A NOT USED
Rx1B RF RECEPTION
Rx2A RF RECEPTION
Rx2B NOT USED
Tx1 RF TRANSMISSION
Tx2 NOT USED
1T1R FDD with DPD Overview
With a minimum number of external components, the ADRV9001 transceiver can be used to build complete RF-to-bits signal chain that
can serve as RF front end in FDD type applications that requires DPD. Internal DPD block can be used to linearize external power
amplifier and improve overall system efficiency. For systems that demand superior LO phase noise performance, ADRV9001 allows user
to apply eternal RF LO. ADRV9001 internal AGC can be used to autonomously monitor and set the appropriate gain level for Rx signal
chain. ADRV9001 can control external LNA using its analog GPIOs as well as provide power amplifier bias voltage by utilizing AuxDAC
outputs.
PA
LPF
TEMPERATURE
SENSOR
OPTIONAL
EXTERNAL
LO SOURCE
BPF FILTER
LNA
Figure 6. ADRV9001 in 1T1R FDD with DPD Type Application
Rev. PrC | Page 16 of 338
Preliminary Technical Data
POWER IC
ADRV9001
VGA
BALUN
Tx1
BALUN
Rx1A
BALUN
Rx1B
BALUN
EXT LO1
/2
RF PLL1
BALUN EXT LO2
/2
RF PLL2
BALUN
Rx2A
BALUN
Rx2B
BALUN
Tx2
AGPIOs AuxADC
Tx1
DATA
3/4/6/7/8/10
INT
SSI
DAC QEC
LOL
DPD
Rx1
DDC DATA
3/6/8
DEC
ADC SSI
QEC
OPTIONAL
DC
14/16
DGPIOs
3
Rx/Tx_ENABLE
GP_INT
3/4
SPI
RESET
Rx2
DDC DATA
3/6/8
DEC
SSI
ADC
QEC
DC
Tx2
INT
DATA
QEC
LOL
SSI
DAC NC
DPD
DEV_CLKL_OUT
MCS
BALUN
DEV_CLK
AuxDAC
FPGA
OR
BBIC
VCXO