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OUTPUT SIGNAL TIMING
The Series 90 provides external signals for use in controlling external devices and equipment.
Refer to the following pages for locations of the signals. These signals are active during Test
mode:
TESTING - when test is in progress
END-OF-TEST - when test is complete
PASS/FAIL - whether test passed or failed
When a test is started, the TESTING signal changes from a logic high state to a logic low, and
remains low until end of test. The END-OF-TEST signal transitions from a logic high state to a
logic low state when the test is complete, and remains low for approximately 15 ms. After 15
ms, END-OF-TEST and TESTING signals return to a logic high state. A PASS/FAIL test status
signal is output and occurs approximately 2 ms before END-OF-TEST transitions to low. If the
test passed, the signal remains high. If the test failed, the signal transitions to a logic low.
(External circuits can use END-OF-TEST to latch the PASS/FAIL test status signal.) The
PASS/FAIL output is held for approximately 2 ms after END-OF-TEST and TESTING return to
the high state. The time diagram is shown in See Figure 20 below:
TESTING
END-OF-TEST
Note: Timing is approximate and can vary between systems.
INPUT SIGNALS
The Series 90 recognizes the following input signals:
FOOT SWITCH - initiates a test if idle or advances from a pause condition
EXECUTE TEST - initiates a test if idle
ABORT – aborts the current operation
2 ms
Figure 20. Signal Timing Diagram
Series 90 Setup Manual
REMOTE SIGNALS
2 ms
15 ms