Alinx ZYNQ7000 FPGA User Manual page 10

2 CPU shares
On-chip boot ROM and 256KB on-chip RAM

 External storage interface, support 16/32 bit DDR2, DDR3 interface
 Two Gigabit NIC support: divergent-aggregate DMA, GMII, RGMII,
SGMII interface
 Two USB2.0 OTG interfaces, each supporting up to 12 nodes
 Two CAN2.0B bus interfaces
 Two SD card, SDIO, MMC compatible controllers
 2 SPIs, 2 UARTs, 2 I2C interfaces
 54 multi-function IOs that can be configured as normal IO or peripheral
control interfaces
 High bandwidth connection within PS and PS to PL
The main parameters of the PL logic part are as follows:
 Logic Cells: 444K
 Look-up-tables (LUTs): 277,400
 Flip-flops: 554,800
 18x25MACCs：2020
 Block RAM：26.5 Mb
 16-channel high-speed GTX transceiver, supporting PCIE Gen2x8;
 Two AD converters for on-chip voltage, temperature sensing and up
to 17 external differential input channels, 1MBPS
XC7Z100-2FFG900I chip speed grade is -2, industrial grade, package is
FGG900, pin pitch is 1.0mm the specific chip model definition of ZYNQ7000
series is shown in Figure 2-2
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ZYNQ FPGA Development Board AX7450 User Manual
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