Cypress PSoC 64 Secure Boot Manual page 10

Table 1-1. Board Pinout
PSoC 64 Pin
P0[0]
P0[1]
P0[2]
P0[3]
P0[4]
P0[5]
P2[0]
P2[1]
P2[2]
P2[3]
P2[4]
P2[5]
P2[6]
P2[7]
P3[1]
P5[0]
P5[1]
P5[6]
P5[7]
P6[3]
P6[4]
P6[5]
P6[6]
P6[7]
P7[0]
P7[1]
P7[2]
P7[3]
P7[7]
CY8CPROTO-064B0S3 PSoC 64 "Secure Boot" Prototyping Kit Guide, Doc. # 002-29505 Rev. *B
Header Primary On-board
Mapping Function
– WCO_IN
– WCO_OUT
J2.15 GPIO
J2.14 GPIO
J1.4 User Button (SW2)
with Hibernate
wakeup capability
J1.5 GPIO
J1.19 GPIO
J1.18 GPIO
J1.17 GPIO
J1.16 GPIO
J1.15 GPIO
J1.14 GPIO
J1.13 GPIO
– Red User LED
(LED3)
– Green User LED
(LED4)
– UART RX
– UART TX
J1.7 GPIO
J1.6 GPIO
J2.13 GPIO
J5.4 I2C_SCL
J5.6 I2C_SDA
J5.9 SWDIO
J5.7 SWDCLK
J2.19 GPIO
J2.18 GPIO
J2.17 GPIO
J2.16 GPIO
– CMOD
Secondary On-board
Function
– –
– –
– –
– –
GPIO Connected to ground as active
LOW logic by default.
– –
– –
– –
– –
– –
– –
– –
– –
GPIO Connected in active LOW
configuration.
GPIO Connected in active LOW
configuration.
GPIO Remove R33 to disconnect from
KitProg3 UART TX.
GPIO Remove R34 to disconnect from
KitProg3 UART RX.
– –
– –
– –
TDO_SWO Remove R31 to disconnect from
KitProg3 I2C_SCL, load R62 to
connect to TDO_SWO.
TDI Remove R32 to disconnect from
KitProg3 I2C_SDA, load R63 to
connect to TDI.
GPIO –
GPIO –
– –
– –
– –
– –
– –
Introduction
Connection details
9