Cypress CYW4373 Manual

Otp memory programming and nvram development

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OTP Memory Programming and NVRAM Development - CYW4373
This application note describes the method for creating an nvram.txt file, which is then used to test a new board
design, optimize NVRAM values, and program the one-time programmable (OTP) nonvolatile memory in the
CYW4373 device using the USB or SDIO host interface for WLAN.
Contents
1 Introduction .................................................................. 1
1.1 IoT Resources ..................................................... 1
Programming Flow ....................................................... 2
4 Customizing nvram.txt File .......................................... 3
4.1 Using nvram.txt File Template ............................ 3
4.2 Editing nvram.txt File ........................................ 12
4.3 Finalizing nvram.txt File .................................... 12
1

Introduction

The Cypress CYW4373 is a single-chip IEEE 802.11a/b/g/n/ac + BT 5.0 device for embedded and IoT applications.
OTP nonvolatile memory is included in the WLAN section of the device to store board-specific information such as
SDIO header, product ID, manufacturer ID, and MAC address. Excluding the internal header information, up to 768
bytes of user accessible OTP memory is available on CYW4373 for WLAN information. The application note provides
OTP programming information for both USB and SDIO host interfaces.
The OTP memory content, along with an editable NVRAM file (nvram.txt file), provides all configuration information
used by the WLAN device driver to initialize and configure CYW4373.
1.1

IoT Resources

Cypress provides a wealth of data at
for your design, and quickly and effectively integrate the device into your design. Cypress provides customer access to
a wide range of information, including technical documentation, schematic diagrams, product bill of materials, PCB
layout information, and software updates. Customers can acquire technical documentation and software from the
Cypress Support Community website (http://community.cypress.com/).
2

OTP Memory Programming Considerations

In embedded designs, the host and device are permanently connected, which is typically done using a hardwired USB
or SDIO interface. The only entry which is mandatory to be programmed into the OTP memory is the SDIO header.
This is because there are certain SDIO function settings which are read before the firmware and NVRAM are
downloaded. To properly set these settings, the SDIO header must be programmed into their OTP memory.
Other than the SDIO header, all other NVRAM parameters can be stored in the host's nonvolatile memory rather than
in the OTP memory. For non-embedded devices that may be installed on different hosts, the OTP memory can be
programmed to protect the unique MAC address and prevent end-users from altering the power control parameters,
such as maximum output power.
www.cypress.com
5 Programming OTP Memory ....................................... 12
5.1
Memory Using iMAX6sx system ................................ 20
6.1 Programming OTP Memory .............................. 21
Document History ............................................................ 26
http://www.cypress.com/internet-things-iot
Document Number. 002-29846 Rev. *A
Author: DK Chen
Associated Part Family: CYW4373
OTP Memory .................................................... 13
to help you to select the right IoT device
AN229846
1

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Summary of Contents for Cypress CYW4373

  • Page 1: Table Of Contents

    4.3 Finalizing nvram.txt File ........12 Introduction The Cypress CYW4373 is a single-chip IEEE 802.11a/b/g/n/ac + BT 5.0 device for embedded and IoT applications. OTP nonvolatile memory is included in the WLAN section of the device to store board-specific information such as SDIO header, product ID, manufacturer ID, and MAC address.
  • Page 2: Nvram Content Development And Memory Programming Flow

    Note: The programming process of an OTP memory is irreversible. Cypress strongly recommends conducting development on boards using the parameters provided in the editable nvram.txt file. Do not program the OTP memory until the contents of the nvram.txt file have been verified and the file has been finalized for production use.
  • Page 3: Customizing Nvram.txt File

    This section describes customizing, editing, and finalizing the nvram.txt file for OTP memory programming. Using nvram.txt File Template For each reference board design, Cypress provides an nvram.txt file for the specific board design. Typically, the file is named in accordance with the board it supports (for example, cyw989373wlpsd.txt).
  • Page 4 Table 1 are used and specified by Cypress and should only be changed by Cypress. It is important that Cypress reviews a customer's design early in the development process. Some of the parameters in Table 1 may need to be changed by Cypress to accommodate differences in the RF front end between the customer's design and the Cypress reference design from which it was derived.
  • Page 5 Cypress might add additional parameters at any time to control the RF performance-related attributes of the driver. Always check with Cypress for the latest version of the nvram.txt file for the reference design before starting any board customization efforts.
  • Page 6 OTP Memory Programming and NVRAM Development - CYW4373 NVRAM Parameter Example Data Description This variable defines the 5 GHz, low sub-band isolation provided by the TR switch when transmitting. rxgains5gtrisoa0 Isolation (dB) = 2 × rxgains5gtrisoa0 + 8. For rxgains5gtrisoa0 = 6, the isolation is 20 dB.
  • Page 7 OTP Memory Programming and NVRAM Development - CYW4373 NVRAM Parameter Example Data Description CCK unsigned power offsets in 1/2 dB steps for 20 U/L rates cckbw20ul2gpo 0x0000 (11, 5.5, 2, 1 Mbps). The most significant nibble is the 11 Mbps offset Core 0 2g CCK PD offset (1/4 dB steps) in 2’s complement format - For...
  • Page 8 OTP Memory Programming and NVRAM Development - CYW4373 NVRAM Parameter Example Data Description 5 GHz, mid sub-band, 11n/ac, 80 MHz, unsigned power offsets in 1/2 dB steps. The most significant nibble is the power offset for MCS9 and the least...
  • Page 9 OTP Memory Programming and NVRAM Development - CYW4373 NVRAM Parameter Example Data Description 5 GHz mid sub-band 40in80, 40in160 OFDM signed power offsets (in 1/2 dB steps) for 64 QAM and above. LSB nibble to MSB nibble: • (0) 40in80 with respect to 40in40 sb40and80hr5gmpo •...
  • Page 10 OTP Memory Programming and NVRAM Development - CYW4373 NVRAM Parameter Example Data Description 5 GHz high/X1 sub-band 40in80, 40in160 OFDM signed power offsets (in 1/2 dB steps) for 64 QAM and above. LSB nibble to MSB nibble: • (0) 40in80 with respect to 40in40 sb40and80hr5ghpo •...
  • Page 11 OTP Memory Programming and NVRAM Development - CYW4373 NVRAM Parameter Example Data Description Bits 11a/g duplicate mode signed power offsets (in 1/2 dB steps) for 16 QAM and below. Common power offset for Dup40, Dup40in80, and Dup40in160 with respect to 40in40 11n/11ac, Quad80 and Quad80in160 with respect to 11ac 80in80, Oct160 with respect to 11ac 160in160.
  • Page 12: Editing Nvram.txt File

    OTP memory programmed for production. Note: The CYW4373 has 368 bytes of space in the OTP memory available for user data and this is for Wifi only (CIS dump). Total OTP contents are 768 bytes (OTP dump). Given the limited space in the OTP memory, it is impossible to program the entire nvram.txt file to the OTP memory.
  • Page 13: Programming Basic Parameters Into Otp Memory

    07 11 – The value of boardrev in reverse hexadecimal byte or 0x1107. Table 5 Table 6 provide an example OTP binary map for a CYW4373 that contains the SDIO header and some of the nvram.txt file parameters listed in Table Note: CIS tuples do not have to be listed in any order because each tuple begins with a unique identifier.
  • Page 14 OTP Memory Programming and NVRAM Development - CYW4373 Table 5. CYW4373 OTP Map for USB (Required in OTP) Offset 00000000 00000010 Other NVRAM Variables (Optional in OTP) 00000020 00000030 00000040 00000050 macaddr=66:55:44:33:22:11 00000060 00000070 00000080 boardtype = 0x084a 00000090 000000a0...
  • Page 15 OTP Memory Programming and NVRAM Development - CYW4373 Table 6. CYW4373 OTP Map for SDIO Offset 00000000 00000010 00000020 00000030 00000040 00000050 00000060 00000070 00000080 00000090 000000a0 000000b0 000000c0 000000d0 000000e0 000000f0 00000100 00000110 00000120 00000130 00000140 00000150 00000160 www.cypress.com...
  • Page 16 OTP Memory Programming and NVRAM Development - CYW4373 SDIO HW Header macaddr=66:55:44:33:22:11 sromrev=11 boardrev=0x1107 boardtype=0x084a OTP end Max WLAN SW/HW Region size = 368 bytes www.cypress.com Document Number. 002-29846 Rev. *A...
  • Page 17: Creating And Editing Otp Binary Map

    Note: Save the file with a .bin file extension so that the data it contains can be programmed into the OTP memory. In this application note, this file is referred as 4373_OTP.bin. Table 7 Table 8 show the hexadecimal OTP binary map template for the CYW4373 USB revision and SDIO revision, respectively. www.cypress.com Document Number. 002-29846 Rev. *A...
  • Page 18 OTP Memory Programming and NVRAM Development - CYW4373 Table 7. CYW4373 USB Hexadecimal OTP Binary Map Template Offset 00000000 00000010 00000020 00000030 00000040 00000050 00000060 00000070 00000080 00000090 000000a0 000000b0 000000c0 000000d0 000000e0 000000f0 00000100 00000110 00000120 00000130 00000140 00000150 00000160 www.cypress.com...
  • Page 19 OTP Memory Programming and NVRAM Development - CYW4373 Table 8. CYW4373 SDIO Hexadecimal OTP Binary Map Template Offset 00000000 00000010 00000020 00000030 00000040 00000050 00000060 00000070 00000080 00000090 000000a0 000000b0 000000c0 000000d0 000000e0 000000f0 00000100 00000110 00000120 00000130 00000140 00000150 00000160 www.cypress.com...
  • Page 20: Programming Cyw4373 Otp

    OTP Memory Programming and NVRAM Development - CYW4373 Programming CYW4373 OTP Memory Using iMAX6sx This section outlines the procedure to program the SDIO header to the OTP of a CYW4373 device using an iMAX6sx FMAC system PC. Figure 2. iMAX6sx FMAC System Example The required hardware includes: ▪...
  • Page 21: Programming Otp Memory

    At prompt, with a specific COM port for iMAX6sx, log in as "root". Copy the CYW4373 driver files and the OTP.bin file to a desired directory. Go to the directory where you copied the CYW4373 driver files. Issue the driver load command as you would normally do on a FMAC system, or: >...
  • Page 22 OTP Memory Programming and NVRAM Development - CYW4373 If your CYW4373 device has never been programmed with the SDIO header in the OTP, check if the cisdump is similar to the following: Source: 2 (Internal OTP) Maximum length: 368 bytes...
  • Page 23 Byte 360: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 If you can confirm that CYW4373 device has never been programmed, then your device has blank CIS and is ready to be programmed. Go to the directory where you copied the OTP.bin file.
  • Page 24 OTP Memory Programming and NVRAM Development - CYW4373 Byte 144: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 Byte 152: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 Byte 160: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 Byte 168: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00...
  • Page 25: Programming Cyw4373 Otp Bd Address

    OTP Memory Programming and NVRAM Development - CYW4373 Programming CYW4373 OTP BD Address Command: #./wl otpraw <bitoffset> <length> <value> Bit offset: The offset of BD address will change when the OTP patch changes. It is recommended that you follow these steps to calculate the bit offset dynamically: Check the value at 16-bits offset 0x0228.
  • Page 26: Document History

    OTP Memory Programming and NVRAM Development - CYW4373 Document History Document Title: AN229846 - OTP Memory Programming and NVRAM Development - CYW4373 Document Number: 002-29846 Revision Submission Description of Change Date 6838397 03/26/2020 New Application Note. Modified SDIO header 0x0 to ‘5b’ from ‘4b’ in the hex value corresponds to - device in...
  • Page 27 “Critical Component” means any component of a High-Risk Device whose failure to perform can be reasonably expected to cause, directly or indirectly, the failure of the High-Risk Device, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from any use of a Cypress product as a Critical Component in a High-Risk Device.

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