Cgfsysmenb] (Supply And Stop Register B For Fsysm) - Toshiba TXZ+ Series Reference Manual

1.4.2.8. [CGFSYSMENB] (Supply and stop register B for fsysm)

Bit Bit Symbol
31 IPMENB31
30 IPMENB30
29 IPMENB29
28:27 -
26 IPMENB26
25 IPMENB25
24:18 -
17 IPMENB17
16 IPMENB16
15 IPMENB15
14 IPMENB14
13 IPMENB13
12 IPMENB12
11 IPMENB11
10 IPMENB10
9 IPMENB09
8 IPMENB08
After reset Type
Clock enable of SIWDT ch0
1 R/W
0: Clock stop
1: Clock supply
Clock enable of NBDIF
1 R/W
0: Clock stop
1: Clock supply
1 R/W Write as "1"
0 R Read as "0"
Clock enable of EI2C ch1
0 R/W
0: Clock stop
1: Clock supply
Clock enable of EI2C ch0
0 R/W
0: Clock stop
1: Clock supply
0 R Read as "0"
Clock enable of DMAC Unit A (TSEL00 to 15)
0 R/W
0: Clock stop
1: Clock supply
Clock enable of TRGSEL
0 R/W
0: Clock stop
1: Clock supply
Clock enable of TRM
0 R/W
0: Clock stop
1: Clock supply
Clock enable of OFD
0 R/W
0: Clock stop
1: Clock supply
Clock enable of RAMP ch1
0 R/W
0: Clock stop
1: Clock supply
Clock enable of A-VE+ ch0
0 R/W
0: Clock stop
1: Clock supply
Clock enable of A-PMD ch2
0 R/W
0: Clock stop
1: Clock supply
Clock enable of A-PMD ch1
0 R/W
0: Clock stop
1: Clock supply
Clock enable of A-PMD ch0
0 R/W
0: Clock stop
1: Clock supply
Clock enable of A-ENC32 ch2
0 R/W
0: Clock stop
1: Clock supply
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TMPM4K Group(2)
Clock Control and Operation Mode
Function
TXZ+ Family
2021-06-15
Rev. 1.1