Table 2.3 Single Chip Mode; Table 2.4 Single Boot Mode - Toshiba TXZ+ Series Reference Manual

(2) TMPM4KxFWA
● Single Chip Mode
Start Address
0x00000000
0x00020000
0x00040000
0x20000000
0x20002000
0x20004000
0x20006000
0x22000000 Bit Band Alias
0x24000000
0x30000000
0x30008000
0x3F7F8000
0x3F7F9800
Refer to "Table 2.5 Connection of peripheral function" for address table during this period.
0x5E000000 Code Flash (Mirror)
: Accessible, -: not accessible, Fault: Fault is caused
● Single Boot Mode
Start Address
0x00000000
0x00001800
0x20000000
0x20002000
0x20004000
0x20006000
0x22000000 Bit Band Alias
0x24000000
0x30000000
0x30008000
0x3F7F8000 Boot ROM (Mirror)
0x3F7F9800
Refer to "Table 2.5 Connection of peripheral function" for address table during this period.
0x5E000000 Code Flash (Mirror)
: Accessible, -: not accessible, Fault: Fault is caused

Table 2.3 Single Chip Mode

Slave
M0
Code Flash
M1
Reserved -
Fault -
RAM0 M5
RAM1 M6
RAM2 SM1
Fault -
-
Fault -
Data Flash M3
Fault -
Boot ROM M4
Fault -
M2

Table 2.4 Single Boot Mode

Slave
Boot ROM M4
Fault -
RAM0 M5
RAM1 M6
RAM2 SM1
Fault -
-
Fault -
Data Flash M3
Fault -
M4
Fault -
M2
Clock Control and Operation Mode
Sub master
Core
DMAC NBDIF
S-Bus
SS0 SS1
Fault Fault
Fault Fault
- -
Fault Fault
 
 
 
Fault Fault
 
Fault Fault
Fault

Fault Fault
Fault Fault
Fault Fault
Fault Fault
Sub master
Core
DMAC NBDIF
S-Bus
SS0 SS1
Fault Fault
Fault Fault
 
 
 
Fault Fault
Fault Fault
Fault Fault
Fault

Fault Fault
Fault Fault
Fault Fault
Fault Fault
50 / 64
TMPM4K Group(2)
Main master
Core Core
D-Bus I-Bus
S1 S2
- Fault
- Fault

- -
- Fault Fault
-

-

-

Fault -
-

Fault -
-

Fault -
-

Fault -
-

Main master
Core Core
D-Bus I-Bus
S1 S2
-

- -
-

-

-

Fault -
Fault -
Fault -
-

Fault -
-

Fault -
-

TXZ+ Family
S3

-
-
-
-
-
-
-
-
-
-
-
-
S3

-
-
-
-
-
-
-
-
-
-
-
-
2021-06-15
Rev. 1.1