Clock Supply Setting Function; Prescaler Clock; Table 1.8 Time Interval For Changing Prescaler Clocks - Toshiba TXZ+ Series Reference Manual

1.2.7. Clock supply setting function

This MCU has the clock supply on/off function for the peripheral circuits. To reduce the power consumption, this
MCU can stop supplying the clock to the peripheral functions that are not used.
Except some peripheral functions, clocks are not supplied after reset.
In order to supply the clock of the function to be used, set the bit of relevance of [CGFSYSENA],
[CGFSYSMENA], [CGFSYSMENB], [CGFCEN] and [CGSPCLKEN] to "1".
For details, refer to "1.4 Explanation of Register".

1.2.8. Prescaler clock

Each peripheral function has a prescaler circuit to divide the ΦT0 clock. The ΦT0 clock which is input into the
prescaler circuit can be divided by the [CGSYSCR]<PRCK[3:0]> to generate High speed prescaler clock. And
Middle speed prescaler clock is generated by dividing High speed prescaler clock using [CGSYSCR]
<MCKSEL[1:0]>. For ΦT0 clock after reset, fc is chosen.
After register writing before a clock actually changes, a time interval shown in Table 1.8 is required.
To confirm the completion of the clock change, check the status of [CGSYSCR]<PRCKST[3:0]>
<MCKSELPST[1:0]>.
Prescaler clock
Note1: Do not change a prescaler clock during operation of peripheral functions, such as a timer counter.
Note2: An access between High speed system clock domain and Middle speed system clock domain
cannot be done when the prescaler clock is changing.

Table 1.8 Time interval for changing prescaler clocks

High speed (ΦT0h)
ΦT0 512 fc cycles at maximum
ΦT0/2 -
ΦT0/4 -
Clock Control and Operation Mode
Middle speed (ΦT0m)
512 fc cycles at maximum
1024 fc cycles at maximum
2048 fc cycles at maximum
21 / 64
TXZ+ Family
TMPM4K Group(2)
2021-06-15
Rev. 1.1