Quectel RM500Q-AE Manual page 40

Host
PCIE_REFCLK_P
PCIE_REFCLK_M
PCIE_TX_P
PCIE_TX_M
PCIE_RX_P
PCIE_RX_M
PCIE_WAKE_N
PCIE_CLKREQ_N
PCIE_RST_N
Note: The voltage level of VCC_IO_HOST depends on the host side due to the open drain in pins
50, 52 and 54.
AT+QCFG="pcie/mode" is used to set PCIe RC/EP mode. For more details about the command,
document [2].
To ensure the signal integrity of PCIe interface, AC coupling capacitors C5 and C6 should be placed close
to the host on PCB. C1 and C2 have been embedded into the module, so do not place these two
capacitors on your schematic and PCB.
RM500Q-AE&RM502Q-AE_Hardware_Design
R4 0R
R5 0R
C5 220 nF
C6 220 nF
VCC_IO_HOST
R1 R2 R3
100k 100k 100k
Figure 17: PCIe Interface Reference Circuit
RM500Q-AE&RM502Q-AE Hardware Design
PCIE_REFCLK_P
55
PCIE_REFCLK_M
53
PCIE_RX_P
49
PCIE_RX_M
47
PCIE_TX_P
43
PCIE_TX_M
41
PCIE_WAKE_N
54
PCIE_CLKREQ_N
52
PCIE_RST_N
50
5G Module Series
Module
C1 220 nF
C2 220 nF
BB
see
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