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BBS
When (Mi) or (Ai) = 1, (PC) ← (PC) + n + REL
Op e r a t io n :
F u n c t io n :
This instruction tests the designated bit i of the M or A and
takes a branch if the bit is 1. The branch address is specified
by a relative address. If the bit is 0, next instruction is exe-
cuted.
St a t u s fla g :
No change
Addressing mode
Accumulator bit
∆BBS∆i,A,$hhll
Relative
Zero page bit
∆BBS∆i,$zz,$hhll
Relative
Notes 1: rr
=$hhll–( +n). The rr
16
2: When a branch is executed, add 2 to the cycle number.
3: When executing the BBS instruction after the contents of the interrupt
request bit is changed, one instruction or more must be passed
before the BBS instruction is executed.
B
RANCH ON
(Mi) or (Ai) = 0, (PC) ← (PC) + n
n : If addressing mode is Zero Page Bit Relative, n=3. And if
addressing mode is Accumulator Bit Relative, n=2.
Statement
(20i+3)
(20i+7)
zz
is a value in a range of –128 to +127.
16
B
S
IT
ET
Machine codes
Byte number
, rr
16
16
,
16
, rr
16
16
BBS
Cycle number
2
4
3
5
35
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