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∆
Instruction
:
2
Byte length
:
5
Cycle number
:
Timing
:
φ
SYNC
R/W
RD
WR
ADDR
DATA
ADDR
H
ADDR
L
PC
/DATA
BA : Basic address
Note : Some p roducts are "01" or content of SPS flag.
SPEC IAL PAGE
∆
JSR
\$hhll
PC
PC +1
Op -code
BA
PC
PC
H
H
O p -
BA
PC
+1
L
L
L
code
S,00 (Note)
Invalid
(PC +1)
L
00 (Note)
(PC
S
S
+1)
S-1,00
BA
L
(Note)
(PC +1)
H
L
FF
(PC
S-1
BA
L
+1)
H
L
,FF
151
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