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IN STRUC TION S
Ad d r e s s in g m o d e :
F u n c tio n :
In s tr u c tio n s :
Ex a m p le :
(A)← (A) + (C) + XX
Assuming that "00
In d ir e c t X
Indirect X
Specifies the contents in a memory location as the
data for the instruction. The address in the memory
location is determined by the following:
(a) A Zero Page memory location is determined by the
adding the Operand and Index Register X (if as a
result of this addition a carry occurs, it is ignored).
(b) The result of the addition is used as the low-order
byte of an address in the Zero Page memory
location and 00
(c) The contents of the address in the Zero Page
memory location is used as the low-order byte of
the address in the memory location.
(d) The next Zero Page memory location is used as
the high-order byte of the address in the memory
location.
ADC, AND, CMP, EOR, LDA, ORA, SBC, STA
Mnemonic
∆
∆
ADC
($1E,X)
Absolute
designation
Op-code (61
Operand (1E
16
" for Data I, and "14
16
as the high-order byte.
16
Machine code
Memory
00
16
Zero page
Data I (00
)
16
04
16
Data II (14
)
05
16
16
FF
16
)
16
+ E6
)
16
16
Data(XX
)
1400
16
16
" for Data ll are stored in advance.
16
Addressing mode
61
1E
16
16
Zero page X
designation
= 1 04
16
Ignored
Contents of Index
Register X
17
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