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IN STRUC TION S
Ze r o Pa g e Bit Re la t iv e
Ad d r e s s in g m o d e :
F u n c tio n :
In s tr u c tio n s :
Ex a m p le :
When the bit 5 at address 04
is cleared, jumps to address * –12.
Zero page
designation
Zero Page Bit Relative
Specifies the address of a memory location where the
next Op-Code is located.
The bit position is designated by the high-order three
bits of the Op-Code. The address in the Zero Page
memory location is determined by using Operand I as
low-order byte of the address and 00
order byte. If the branch condition is satisfied, Oper-
and Il and the Program Counter are added. The result
of this addition is the address in the memory location.
When the branch condition is not satisfied, the next
instruction is executed.
BBC, BBS
Mnemonic
∆
∆
BBC
5,$04,∗–12
16
Memory
00
16
Zero page
bit 5
04
0
16
FF
16
Address to be
*–12
executed next
Bit designation
Op-code(B7
)
16
1
0
1 1
0
1
1 1
*
Operand I (04
)
16
Operand II (F1
)
16
*+3
Machine language
B7
Decimal
When the bit 5 at address 04
is set, goes to address * +3.
Zero page
designation
Bit designation
Jump
1
Operand I (04
Operand II (F1
Addressing mode
as the high-
16
04
F1
16
16
16
16
Memory
00
16
Zero page
bit 5
04
1
16
FF
16
Op-code(B7
)
16
0
1 1
0
1
1 1
*
)
16
)
16
Address to be
*+3
executed next
25
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