Table of Contents
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IN STRUC TION S
3.3 Description of instructions
This section presents in detail the 740 Family instructions by arranging mnemonics of instruc-
tions alphabetically and dividing each instruction essentially into one page.
The heading of each page is a mnemonic. Operation, explanation and changes of status flags
are indicated for each instruction. In addition, assembler coding format, machine code, byte
number, and list of cycle numbers for each addressing mode are indicated.
The following are symbols used in this manual:
Symbol
A
Accumulator
Ai
Bit i of Accumulator
PC
Program Counter
PC
Low-order byte of Program
L
Counter
PC
High-order byte of Program
H
Counter
PS
Processor Status Register
S
Stack Pointer
X
Index Register X
Y
Index Register Y
M
Memory
Mi
Bit i of memory
Carry Flag
C
Z
Zero Flag
I
Interrupt Disable Flag
D
Decimal Operation Mode Flag
B
Break Flag
T
X Modified Operations Mode
Flag
Overflow Flag
V
N
Negative Flag
Relative address
REL
BADRS
Break address
30
Description
Symbol
hh
Address high-order byte data
in 0 to 255
ll
Address low-order byte data
in 0 to 255
zz
Zero page address data in 0
to 255
nn
Data in 0 to 255
i
Data in 0 to 7
Contents of the Program
Counter
∆
Tab or space
#
Immediate mode
\
Special page mode
$
Hexadecimal symbol
+
Addition
–
Subtraction
Multiplication
/
Division
∧
Logical AND
∨
Logical OR
∀
Logical exclusive OR
( )
Contents of register, memory,
etc.
←
Direction of data transfer
Instruction Set
Description
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