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AD C
When (T) = 0, (A) ← (A) + (M) + (C)
Op e r a t io n :
F u n c t io n :
When T = 0, this instruction adds the contents M, C, and A;
and stores the results in A and C.
When T = 1, this instruction adds the contents of M(X), M and
C; and stores the results in M(X) and C. When T=1, the
contents of A remain unchanged, but the contents of status
flags are changed.
M(X) represents the contents of memory where is indicated by
X.
St a t u s fla g : N :
V :
T :
B :
I :
D :
Z :
C :
Addressing mode
∆ADC∆#$nn
Immediate
∆ADC∆$zz
Zero page
∆ADC∆$zz,X
Zero page X
∆ADC∆$hhll
Absolute
∆ADC∆$hhll,X
Absolute X
∆ADC∆$hhll,Y
Absolute Y
∆ADC∆($zz,X)
(Indirect X)
∆ADC∆($zz),Y
(Indirect Y)
Notes 1: When T=1, add 3 to the cycle number.
2: When ADC instruction is executed in the decimal operation mode (D
= 1), decision of C is delayed. Accordingly, do not execute the
instruction which operates C such as SEC, CLC, etc.
AD
D WITH
(T) = 1, (M(X)) ← (M(X)) + (M) + (C)
N is 1 when bit 7 is 1 after the operation; otherwise it is
0.
V is 1 when the operation result exceeds +127 or –128;
otherwise it is 0.
No change
No change
No change
No change
Z is 1 when the operation result is 0; otherwise it is 0.
C is 1 when the result of a binary addition exceeds 255 or
when the result of a decimal addition exceeds 99;
otherwise it is 0.
Statement
C
ARRY
Byte number
Machine codes
69
, nn
16
16
65
, zz
16
16
75
, zz
16
16
6D
, ll
, hh
16
16
16
7D
, ll
, hh
16
16
16
79
, ll
, hh
16
16
16
61
, zz
16
16
71
, zz
16
16
AD C
Cycle number
2
2
2
3
2
4
3
4
3
5
3
5
2
6
2
6
31
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