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IN STRUC TION S
Ad d r e s s in g m o d e :
F u n c tio n :
In s tr u c tio n s :
Ex a m p le :
(A) ← (A) + (C) + XX
Assuming that "01
18
In d ir e c t Y
Indirect Y
Specifies the contents in a memory location as the
data for the instruction. The address in the memory
location is determined by the following:
(a) The Operand is used the low-order byte of an
address in the Zero Page memory location and
00
of the high-order byte.
16
(b) The contents of the address in the Zero Page
memory location is used as the low-order byte of
an address. The next Zero Page memory location
is used as the high-order byte.
(c) The Index Register Y is added to the address in
Step b. The result of this addition is the address
in the memory location.
ADC, AND, CMP, EOR, LDA, ORA, SBC, STA
Mnemonic
∆
∆
ADC
($1E),Y
Memory
Zero page
Data I (01
Data II (12
Zero page
indirect
designation
Op-code (71
Operand (1E
Data (XX
16
" for Data I, and "12
16
Machine code
00
Contents of Index Register Y
16
)
16
1E
16
1201
+ E6
16
)
1F
16
16
FF
16
)
16
)
16
)
12E7
16
16
" for Data ll are stored in advance.
16
Addressing mode
71
1E
16
16
= 12E7
16
16
Absolute Y
designation
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