Mitsubishi M16C/60 Series Software Manual page 11

16-bit single-chip microcomputer
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C EN TRAL PROC ESSIN G UN IT
[ X modified operation mode flag T ] ----------------------- Bit 5
This flag determines whether arithmetic operations are performed via the Accumulator or
directly on a memory location. When the flag is set to "0", arithmetic operations are
performed between the Accumulator and memory. When "1", arithmetic operations are
performed directly on a memory location.
This flag is set by the SET instruction and is cleared by the CLT instruction.
(1) When the T flag = 0
A ← A * M2
* : indicates an arithmetic operation
A: accumulator contents
M2: contents of a memory location specified by the addressing mode of the
(2) When the T flag = 1
M1 ← M1 * M2
* : indicates arithmetic operation
M1: contents of a memory location, designated by the contents of Index
M2: contents of a memory location specified by the addressing mode of
[ Overflow flag V ] ------------------------------------------------- Bit 6
This flag is set to "1" when an overflow occurs as a result of a signed arithmetic operation.
An overflow occurs when the result of an addition or subtraction exceeds +127 (7F
–128 (80
) respectively.
16
The CLV instruction clears the Overflow Flag. There is no set instruction.
The overflow flag is also set during the BIT instruction when bit 6 of the value being tested
is "1."
Overflows do not occur when the result of an addition or subtraction is equal to or
smaller than the above numerical values, or for additions involving values with different
signs.
[ Negative flag N ] ------------------------------------------------- Bit 7
This flag is set to match the sign bit (bit 7) of the result of a data or arithmetic operation.
This flag can be used to determine whether the results of arithmetic operations are positive
or negative, and also to perform a simple bit test.
Table 2.5.1 Instructions to set/clear each flag of processor status register
Flag C
Set instruction
SEC
Clear instruction
arithmetic operation
Register X.
arithmetic operation.
Flag Z
Flag I
SEI
CLC
CLI
Processor Status Register (PS)
Flag B
Flag D
Flag T
SED
SET
CLD
CLT
) or
16
Flag V
Flag N
CLV
5

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