∆
Instructions
:
STP
∆
WIT
Byte length
:
1
Timing
:
φ
SYNC
R/W
RD
WR
ADDR
PC
DATA
PC
ADDR
H
ADDR
L
PC
L
/DATA
110
IM PLIED
Op -code
H
In-
O p -
PC
+1
L
code
valid
PC +1
Invalid
PC
H
PC
+1
L
Return from standb y
state is excuted b y ex-
ternal interrup t.
Return from wait state is
excuted b y internal or
external interrup t.