Clock Mode Selection Jumper (Jp21) - Analog Devices EZ-KIT Lite Manual

Table 2-8. Boot Mode Select Jumper (JP20) Settings (Cont'd)
EBOOT
Pins 1 & 2
Installed
Installed
Not installed

Clock Mode Selection Jumper (JP21)

The jumper controls the speed for the core and external port of the
JP21
ADSP-21161N processor. The frequency supplied to
sor may be changed by removing the 25 MHz oscillator (
shipped with the board and replacing it with a different oscillator or crys-
tal ( ). A clock mode and frequency should be selected so that the
Y2
minimum and maximum specs of the ADSP-21161N processor are not
exceeded. For more information on clock modes, see the ADSP-21161
SHARC Processor Hardware Reference.
for the clock modes.
Table 2-9. Clock Mode Selections
CLKDBL
Pins 1 & 2
Not installed
Not installed
Not installed
Installed
Installed
Installed
ADSP-21161N EZ-KIT Lite Evaluation System Manual
LBOOT BMS
Pins 3 & 4 Pins 5 & 6
Not installed Not installed
(input)
Installed Installed (input)
Not installed Installed (input)
CLK_CFG1 CLK_CFG0
Pins 3 & 4 Pins 5 & 6
Installed Installed
Installed Not installed
Not installed Installed
Installed Installed
Installed Not installed
Not installed Installed
EZ-KIT Lite Hardware Reference
Processor Boot Mode
Link Port Boot
No Boot
Reserved
CLKIN
Table 2-9 shows the jumper setting
Core Clock
Ratio
2:1
3:1
4:1
4:1
6:1
8:1
of the proces-
) that is
U24
External Port
Clock Ratio
1x
1x
1x (default)
2x
2x
2x
2-11