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AHIP-370 Manual
Configuration Options
Jumpers
The following tables list AHIP-370 jumpers, their default positions and their func-
tions. The jumpers marked "Access" are placed at the top of the board for easy cus-
tomer access.
Jumper
J1
J2
J3
J4
J7
J8
J9
J18
The BIOS recovery scheme used on the AHIP6 utilizes a jumper (J5) to select recov-
ery mode. The Flash Programmable Gate Array (FPGA) at U15 uses this to define
the state of address signal A18 into the flash chip. According to the following table:
*Recent changes in flash technology have mandated that J5 be in the B position for
normal operation. This is confusing, as it is contrary to the design documentation
and user manual. Because of this, J5 has been eliminated on the AHIP-370. A 1K
pull-down resistor is connected to signal XD (4) to simulate the B position.
14
Table 2-1. AHIP-370 Jumpers
Position
A
Push button reset switch DISABLED (Access)
B
Push button reset switch ENABLED
A
CMOS OK (Access)
B
Clear CMOS
A
Flat panel selected (Access)
B
CRT selected
A
Normal
B
Program the H8
A
Boot flash enabled
B
Boot ROM enabled
A
Enables RS-485 port in the assertive state.
B
Enables RS-485 port in the negated state.
A
DTR used to control the RS-485 port
B
RTS used to control the RS-485 port
A
VGA ENABLED
B
VGA DISABLED
J5*
Mode
A
Normal
B
Recovery
Function
Flash A18 state
Inverted
Not Inverted
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