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Summary of Contents for Xycom AHIP-370
- Page 1 AHIP-370 Advanced High Integration Platform ® with PPGA Celeron Processor P/N 350370(C) 2002 XYCOM AUTOMATION, INC. Printed in the United States of America...
- Page 2 This document is copyrighted by Xycom Automation Incorporated (Xycom) and shall not be reproduced or copied without expressed written authorization from Xycom. The information contained within this document is subject to change without notice. Xycom does not guarantee the accuracy of the information and makes no commitment toward keeping it up to date.
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Page 3: Table Of Contents
Table of Contents Table of Contents Chapter 1 Introduction ..........................5 Product Overview ............................5 Module Features ............................5 Architecture ............................... 6 Local Bus Interfaces..........................7 Fast IDE controller ..........................7 Accelerated Graphics Port (AGP) ......................7 XGA Graphics Controller........................7 On-board Memory ............................. - Page 4 AHIP-370 Manual Backlight Inverter Connector (DCINV1) ....................25 Chapter 3 – BIOS Setup Menus ....................... 27 Moving through the Menus ........................27 BIOS Main Setup Menu........................... 28 IDE Submenu ............................29 Cache Submenu............................30 Advanced Menu............................31 I/O Device Configuration Submenu......................32 Advanced Chipset Control Submenu ......................
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Page 5: Chapter 1 Introduction
Product Overview The Xycom Automation Advanced High-Integration Platform 370 (AHIP-370) board is developed expressly for use in Xycom’s line of flat panel industrial personal com- puters. It is based on the AHIP6 but is optimized in design, layout, and features for use with flat panel computer systems. -
Page 6: Architecture
AHIP-370 Manual Architecture Figure 1-1. AHIP-370 Block diagram... -
Page 7: Local Bus Interfaces
Chapter One - Introduction Local Bus Interfaces The Celeron design uses the 440BX chip set. The 440BX integrates a high perform- ance interface from PCI to IDE. This interface is capable of accelerated data transfers. The 440BX chipset provides an accelerated PCI-to-ISA interface that includes •... -
Page 8: On-Board Memory
SDRAM (with up to 512 MB capability in the future). The memory site is populated by 100 MHz synchronous DRAM. Flash BIOS The AHIP-370 board uses a Flash BIOS. Flash is used for system BIOS and video BIOS. Non-volatile SRAM The AHIP-370 hardware supports non-volatile SRAM. -
Page 9: Serial And Parallel Ports
Hard and Floppy Drives The floppy interface supports one floppy drive. The AHIP-370 can interface to a floppy via the on-board floppy connector or the external floppy connector. In order to connect a floppy drive to the external connector after power up, the... -
Page 10: Environmental Specifications
(Power On Self Test). The enhanced IDE (EIDE) interface supports up to 2 hard drives. Hard drive inter- face is via the Xycom plug-in backplane or the on-board IDE controller. Caution The higher the PIO mode, the shorter the cycletime. As the IDE cable length increases, this reduced cycle time can lead to erratic operation. -
Page 11: Hardware Specifications
Specification Power Specifications: The maximum current that the supply can deliver is 19A. The CPU power supply on the AHIP-370 provides a voltage range of 1.30V to 2.05V in increments of 50mV. The CPU selects its voltage through its four outputs VID3- VID0. -
Page 13: Chapter 2 - Installation
Chapter Two - Installation Chapter 2 – Installation This chapter provides information on configuring the AHIP-370 Processor Module. Pinouts for the connectors are located in Appendix C. Figure 2-1 illustrates the jumper and connector locations on the AHIP-370. TOUCH KEYPAD LED IN CONN. -
Page 14: Configuration Options
This is confusing, as it is contrary to the design documentation and user manual. Because of this, J5 has been eliminated on the AHIP-370. A 1K pull-down resistor is connected to signal XD (4) to simulate the B position. - Page 15 RS-485 port. On the AHIP6, the RS-485 is enabled by asserting DTR. Two jumpers were added to the AHIP-370 to allow either DTR or RTS to control the RS-485 drives and determine whether the asserted or negated state will enable it.
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Page 16: System Interrupts
The BIOS setup menu controls the interrupts for the serial and the parallel port. The two Serial ports on the AHIP-370 board can be mapped to any two of the fol- lowing interrupts: 3, 4, 10, & 11 (defaults are interrupts 3 and 4). One parallel port can be mapped to IRQ5 or IRQ7. -
Page 17: Dma Mapping
DMA channels 0-3 are 8-bit and DMA channels 5-7 are 16-bit. When the ECP option is enabled, one of the 8-bit DMA channels is used. Memory Map The following table shows the AHIP-370 memory map. The I/O designation refers to memory viewed as part of the AT bus. Table 2- 5. Memory Map... -
Page 18: I/O Map
AHIP-370 Manual I/O Map The I/O map for the AHIP-370 in Table 2- 6 contains all the I/O ports of the IBM AT architecture with some additions. Table 2- 6. I/O Map Hex Range Device 000-01F DMA controller 1, 8237A-5 equivalent... - Page 19 Chapter Two - Installation Hex Range Device 3BC-3BF reserved for parallel port 3C0-3CF VGA registers (see Note 2) 3D0-3DF CHIPS flat panel & color mode registers 3E0-3EF Available 3F0-3F7 Primary Floppy disk controller 3F8-3FF Serial port 1 (see Note 1) AGP configuration address register (see Note 4) AGP configuration data register (see Note 4) Note 1...
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Page 20: Registers
AHIP-370 Manual Registers The AHIP-370 contains five I/O ports: 231h, 233h, 234h, and a user-definable port (port 180/1h, 2E0/1h, 3E0/1h, or 300/1h). These ports are compatible with AHIP4+ and AHIP 6+. Register 231h – Miscellaneous Control Register 231h controls the LEDs and signals shown in the following table. -
Page 21: Register 234H - I/O Port Location
Chapter Two - Installation Register 234h - I/O Port Location Register 234h controls the I/O port location register shown in the following table. Table 2- 9. Register 234h - I/O Port Location Register Signal Result Reserved Reserved Reserved Reserved I/O range select I/O range select bit 0 I/O range select I/O range select bit 1... -
Page 22: Offset Registers
AHIP-370 Manual Offset Registers The following registers are located starting at the I/O location defined by register 234h. Table 2- 11. I/O Port Selection (Port Address) I/O port selection Port address 180h 2E0h 3E0h 300h Offset 0 Page Register for Programming (Port Address) Offset 0 is a read-only register that checks the battery status Table 2- 12. -
Page 23: Offset 1 Page Register For Programming (Port Address +1)
Reserved Reserved Reserved Reserved Connectors This section describes the connectors for the AHIP-370. Appendix C provides the pinouts for each of the connectors. Parallel Port Connector (PARCOM2) The parallel port is a stacked DB 25-pin connector. Serial Port Connectors There are two serial ports supported on the AHIP-370 board. -
Page 24: Ps/2 Keyboard/Mouse Connector (Kbms1)
AHIP-370 Manual The BIOS setup determines whether the COM2 is used for the RS-232 connector or the IR interface. Jumpers on the touchscreen controller select the COM2 port or the auxiliary port. If a touchscreen controller is jumpered for COM2, this COM port is not available. -
Page 25: Isa/Ide Backplane Connector (Atide1)
Chapter Two - Installation ISA/IDE Backplane Connector (ATIDE1) The ISA/IDE Backplane connector is a 120-pin connector. This connector provides both ISA and IDE signals to the backplane. IDE Connector (HDD1) IDE hard drive connector is a 40-pin header. This header is intended for future op- tions and testing. -
Page 27: Chapter 3 - Bios Setup Menus
The AHIP-370 customized BIOS is designed to surpass the functionality provided for normal PC/ATs. This custom BIOS allows you to access the value-added features on the AHIP-370 module without interfacing to the hardware directly. Moving through the Menus General instructions for navigating through the screens are described below:... -
Page 28: Bios Main Setup Menu
If the Boot Time Diagnostic Screen (in the Advanced Menu) is enabled on your system, the BIOS will display the following message: “Press F2 to enter Setup.” Xycom BIOS Setup Utility Main Advanced Security... -
Page 29: Ide Submenu
Displays the amount of extended memory detected during boot-up. This field is not user configurable. Cache RAM Displays the amount of cache detected and allows entry into the cache submenu. IDE Submenu Xycom BIOS Setup Utility Main IDE Primary Master (C: 1082 Mb) Item Specific Help Type:... -
Page 30: Cache Submenu
F10 Save & Exit Figure 3-3. Memory Cache Submenu Enabling cache increases CPU performance by holding data most re- cently accessed in a special high-speed static RAM area called cache. The AHIP-370 provides two levels of cache memory; level one is 16 K... -
Page 31: Advanced Menu
BIOS or AT-bus memory. Enabling cache may increase system performance, depending on how the extended BIOS is accessed. The default is disabled. Advanced Menu Figure 3-4. Advanced Setup Menu Xycom BIOS Setup Utility Main Advanced Security Exit Item Specific Help... -
Page 32: I/O Device Configuration Submenu
Controls configuration of local bus IDE adapter. Default is [Both] (primary and secondary). On-board Socket Site Allows entry into socket site submenu. Flat Panel Allows entry into flat panel submenu. I/O Device Configuration Submenu Xycom BIOS Setup Utility Advanced I/O Device Configuration Item Specific Help COM A: [Auto]... -
Page 33: Advanced Chipset Control Submenu
Select an interrupt request for the corresponding peripheral. Mode Controls the protocol for the corresponding peripheral. 1 = Visible only when corresponding peripheral is “Enabled” Advanced Chipset Control Submenu Xycom BIOS Setup Utility Advanced Advanced Chipset Control Item Specific Help Enable Memory Gap... -
Page 34: On-Board Socket Site Submenu
ECC memory. Requires ECC memory. Default is [Multiple bit]. 8-bit I/O Recovery Number of ISA clock cycles inserted between back-to-back I/O operations. 16-bit I/O Recovery On-board Socket Site Submenu Xycom BIOS Setup Utility Advanced On-board Socket Site Item Specific Help 32-pin Socket Site Address... -
Page 35: Flat Panel Submenu
Chapter Three – BIOS Setup Menus Flat Panel Submenu Xycom BIOS Setup Utility Advanced Flat Panel Item Specific Help Default Panel Type 640 x 480 STN If the item you Video Screen Expansion [ON] are viewing has Simultaneous Video [Disabled] specific help, it will be listed here. -
Page 36: Security Menu
AHIP-370 Manual Security Menu PhoenixBIOS Setup–Copyright 1985-95 Phoenix Technologies Ltd. Main Advanced Security Power Exit Item Specific Help Supervisor Password is: Clear User Password is: Clear Set Supervisor Password: [Enter] If the item you Set User Password: [Enter] are viewing has... -
Page 37: Power Menu
Chapter Three – BIOS Setup Menus Option Description Diskette Access Restricts access to floppy drives to the supervisor when set to “Supervisor.” Requires setting the Supervisor password. User Mode Defines “User” access as [Normal] or [Restricted]. In normal mode you can access the data/time, user password, power, 32-pin socket, flat panel, boot order, and disk setup settings. -
Page 38: Device Monitoring Submenu
AHIP-370 Manual Device Monitoring Submenu Xycom BIOS Setup Utility Power Device Monitoring Item Specific Help IDE Primary Master [Disabled] If the item you IDE Primary Slave [Disabled] are viewing has IDE Secondary Master [Disabled] specific help, it will IDE Secondary Slave [Disabled] be listed here. -
Page 39: Boot
Chapter Three – BIOS Setup Menus Boot PhoenixBIOS Setup–Copyright 1985-95 Phoenix Technologies Ltd. Boot Item Specific Help +Removable Devices +Fixed Drives If the item you ATAPI CD-ROM Drive are viewing has Network Drive specific help, it will be listed here. ↑↓... -
Page 40: Exit Menu
AHIP-370 Manual Exit Menu PhoenixBIOS Setup–Copyright 1985-95 Phoenix Technologies Ltd. Main Advanced Security Power Exit Item Specific Help Exit Saving Changes Exit Discarding Changes If the item you Load Setup Defaults are viewing has Discard Changes specific help, it will Save Changes be listed here. -
Page 41: Appendix A- Dram Installation
Appendix A – DRAM Installation Appendix A- DRAM Installation The AHIP-370 has a two 168-pin DIMM sockets in which to add memory. Due to the CPU speed, SRAM access time should be 100 MHz and must be 60 ns to run with faster SDRAM. - Page 42 AHIP-370 Manual DIMM MEMORY LOCKING MECHANISM Insert memory vertically DIMM SOCKET Memory inserted Figure A-1. SDRAM Installation...
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Page 43: Appendix B - Video Modes
Appendix B – Video Modes Appendix B – Video Modes Introduction Appendix B defines the video modes and the panels the AHIP-370 supports. Video Modes The Chips & Technologies 69000 VGA controller supports many standard, VESA, and extended modes. The 69000 runs in AGP, 1X mode at 66 MHz. The following tables list the standard and extended video modes and whether they passed, failed or are not supported with the CRT, TFT active color, or STN passive color displays. -
Page 44: Extended Modes
AHIP-370 Manual Extended Modes Mode VESA Number Pixels Display C&T Mode of colors mode 640x400 graphics 640x480 graphics 640x480 graphics 640x480 graphics 640x480 graphics 800x600 graphics 800x600 graphics 800x600 graphics 800x600 graphics 1024x768 graphics 1024x768 graphics 1024x768 graphics 1024,768 graphics... -
Page 45: Windows 3.1
Appendix B – Video Modes Windows 3.1 Windows 3.1 driver (version 1.1.8) C&T 69000 1024x768x16 1024x768x256 1024x768x32K 1024x768x64K 1280x1024x16 1280x1024x256 640x480x16 640x480x256 640x480x32k 640x480x64k 640x480x16M 800x600x16 800x600x256 800x600x32k 800x600x64k 800x600x16M = All windows' drivers were tested on a NEC multi-sync 5FG monitor... -
Page 46: Windows '95
AHIP-370 Manual Windows ‘95 Windows 95 driver (version 1.3.2 - included with Windows 95) C&T 69000 Display Drivers 1024x768x16 1024X768X256 1024X768X16bit 1024x768x24bit 640x480x16 640x480x256 640x480x16bit 640x480x24bit 640x480x20bit (True Color) 800x600x16 800x600x256 800x600x16bit 800x600x24bit... - Page 47 Appendix B – Video Modes Video Modes Supported on Windows NT 640x480x256 800x600x256 1024x768x256 1280x1024x256 640x480x65536 800x600x65536 1024x768x65536 640x480x16777216 800x600x16777216...
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Page 49: Appendix C- Pinouts
Appendix C - Pinouts Appendix C– Pinouts This appendix describes the pinouts for the AHIP-370 connectors defined in Chapter VGA Connector (VGA1) Signal GREEN BLUE ORB_GND ORB_GND ORB_GND ORB_GND Fused VCC ORB_GND DDCDAT HSYNC VSYNC DDCCLK NC = no connect... -
Page 50: Com1 Connector Rs-232/Rs-485 (Com1_4)
AHIP-370 Manual COM1 Connector RS-232/RS-485 (COM1_4) Signal Signal DCD1 TXD- RXD1 TXD+ TXD1 TXD TERM - DTR1 TXD TERM + DSR1 RXD- RTS1 RXD+ CTS1 RXD TERM + RXD TERM - Note ‘A’ denotes the lower connector (RS-232) and ‘B’ denotes the upper connector (RS-485). - Page 51 Appendix C – Pinouts Signal Signal AUTOFEED PERROR INIT SELIN DTR2 Note ‘A’ denotes the lower connector (LPT1) and ‘B’ denotes the upper con- nector (COM2, RS-232). This connector also contains the remote system reset option. The reset jumper (J1) must be in position B for this option to work.
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Page 52: Dcin1 Power Connector (Pwr1)
AHIP-370 Manual DCIN1 Power Connector (PWR1) Signal 3.3V 3.3V 5VSB 3.3V PSON Note -5V is not provided by the power supplies and will have to be created on the backplane board. -
Page 53: Touch Control Connector (Tctrl1)
Appendix C – Pinouts Touch Control Connector (TCTRL1) Signal Signal KB_AIN0 +12V KB_AIN1 -12V RESET TXD2 TCH_RXD2 KB_P14 AUX_CLK AUX_DATA AUX_DATA H8_CLK AUX_CLK H8_DATA SENSE TCH_LED*... -
Page 54: Touch Connector (Tch1)
AHIP-370 Manual Touch Connector (TCH1) Signal SENSE Internal Mouse Connector (MS2) Signal 5VFUSE AUX_CLK AUX_DATA... -
Page 55: Internal Led Connector (Ledmsc1)
Appendix C – Pinouts Internal LED Connector (LEDMSC1) Signal Signal 5VFUSE KSI(6) 5VFUSE IR_RXD2 COM_LED TXD2 ALPHA_LED IR_MODE USER_LED KSO(12) IDEACTP_LED KSI(7) LED In_Keypad Connector (LEDKB1) Signal Signal IDEACTP_LED USER_LED ALPHA_LED IR_MODE COM_LED TXD2 IR_RXD2 +5V (thru 330Ω res) -
Page 56: Flat Panel Connector (Fpnl1 And Fpnl2)
AHIP-370 Manual Flat Panel Connector (FPNL1 and FPNL2) Signal Signal SHFCLK P(4) P(5) P(6) P(7) P(16) P(17) VCCSW P(18) VCCSW P(19) P(20) PANEL_LOGIC P(21) PANEL_LOGIC P(22) +3.3V_CPU P(23) +3.3V_CPU P(8) FPSEL(0) P(9) FPSEL(1) P(10) FPSEL(2) P(11) FPSEL(3) +12V P(12) NC(Note 1) -
Page 57: Internal Keyboard Connector (Kybd1)
Appendix C – Pinouts Internal Keyboard Connector (KYBD1) Signal KB_CLK KB_DATA 5VFUSE SPEAKER PS/2 Keyboard/Mouse Connector (KBMS1) Note If the touchscreen controller is using the mouse port, this interface will not be available. Signal Signal KB_DATA AUX_DATA 5VFUSE 5VFUSE KB_CLK AUX_CLK Internal Floppy Connector (FDD1) Signal... -
Page 58: External Floppy Connector (Fdd2)
AHIP-370 Manual External Floppy Connector (FDD2) Signal Signal FSTEP* IDX* FDS1* FWD* FWE* DCHG* FTK0* FWP* MO1* FRDD* FDIRC* FHS*... -
Page 59: Ide Connector (Hdd1)
Appendix C – Pinouts IDE Connector (HDD1) Signal Signal IDERESET* HDRQ0 HDD7 HDIOW* HDD8 HDD6 HDIOR* HDD9 HDD5 HDIORDY HDD10 ALE (pullup) HDD4 HDAK0 HDD11 HDD3 IRQ14 HDD12 HDIOCS16* HDD2 HDA1 HDD13 HDD1 HDA0 HDD14 HDA2 HDD0 HDCS0* HDD15 HDCS1* IDEACTP*... -
Page 60: Isa/Ide Backplane Connector (Atide1)
AHIP-370 Manual ISA/IDE Backplane Connector (ATIDE1) Signal Signal SD(7) IOCHK* SD(6) RESETDRV SD(5) IRQ9 SD(4) SD(3) DRQ2 SD(2) 0WS* SD(1) IOCHRDY SD(0) SA(19) SMEMW* SA(18) SMEMR* SA(17) IOW* SA(16) IOR* SA(15) DACK3* SA(14) DRQ3 SA(13) DACK1* SA(12) DRQ1 SA(11) REF*... - Page 61 Appendix C – Pinouts Signal Signal HDDRQ0 DRQ7 MASTER16* HDD(7) IDERST* HDD(6) HDD(8) HDD(5) HDD(9) HDD(4) HDD(10) HDD(3) HDD(11) HDD(2) HDD(12) HDD(1) HDD(13) HDD(0) HDD(14) HDIOW* HDD(15) HDIORDY HDIOR* IDE_IRQ HDIOCS16* HDA0 HDA1 HDCS0* HDA2 IDEACTP* HDCS1*...
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Page 62: Pci Backplane Connector (Pcimg1)
AHIP-370 Manual PCI Backplane Connector (PCIMG1) Signal Signal -12V +12V PIRQA* PIRQC* PIRQB* PIRQD* PCLKS3 REQ3* REQ1* GNT3* GNT1* PCLKS2 AGPRST* PCLKS0 GNT0* REQ0* REQ2* AD(30) PAD(31) +3.3V_CPU PAD(29) PAD(28) PAD(26) PAD(27) PAD(25) PAD(24) +3.3V_CPU GNT2* C_BE*(3) +3.3V_CPU PAD(23) PAD(22) - Page 63 Appendix C – Pinouts Signal Signal +3.3V_CPU PAD(14) PAD(13) PAD(11) PAD(12) PAD(10) PAD(9) C_BE*(0) PAD(8) +3.3V_CPU PAD(7) PAD(6) +3.3V_CPU PAD(4) PAD(5) PAD(3) PAD(2) PAD(0) PAD(1) REQ64* (pullup) ACK64* (pullup)
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Page 64: Keypad Connector (Keypad1)
AHIP-370 Manual Keypad connector (KEYPAD1) Signal Signal KSI(7) KSO(9) KSO(0) KSO(10) KSO(1) KSI(0) KSO(2) KSI(1) KSO(3) KSI(2) KSO(4) KSI(3) KSO(5) KSI(4) KSO(6) KSI(5) KSO(7) KSI(6) KSO(8) USB Connector Description Description 5V Fuse USBP0+ USBP1+ USBP0- USBP1-... - Page 65 Index Index Advanced Menu, BIOS setup, 31 Interrupts, 16 BIOS compatibility, 40 BIOS controlled, 16 BIOS menus defaults, 16 Advanced Menu, 31 jumpers Advanced Chipset Control Sub-menu, 33 location, 13 Integrated Peripherals Sub-menu, 32, 34, 35, 38 Jumpers Exit Menu, 39, 40 location, 13 Main Setup Menu, 28 Keyboard controller...
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