Avalue Technology ECM-CX700 User Manual page 63

3.5" via eden v4 1 ghz/500mhz micro module with vga, 2-ch lvds, dvi, tv-out, 5.1 ch audio, dual lan, cf, pci-104, 2 sata, 2 com, 4 usb 2.0 & 8-bit gpio
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3.5.3.1 DRAM Clock/Drive Control
This section can set the DRAM clock/driver timing.
Item
DRAM Clock
DRAM Timing
SDRAM CAS Latency
Bank Interleave
Precharge to Active(Trp)
Active to Precharge(Tras)
Active to CMD(Trcd)
REF to ACT/REF to REF(Trfc) 08T, 09T...~70T, 71T
ACT(0) to ACT(1) (TRRD)
Read to Precharge (Trtp)
Writ to Read CMD (Twtr)
Write Recovery Time (Twr)
DRAM Command Rate
RDSAIT Mode
RDSAIT Selection
Options
By SPD
100NHz
Set the memory bus frequency to operate at
133 MHz
various values for the proper memory clock
166 MHz
setting
200 MHz
266 MHz
Manual
Set the memory timings for the said timings or
Auto By SPD
DRAM Cycle Lengths of 2 or 2.5.
1.5/2
This controls the time dealy passing before the
2/3
SDRAM starts to carry out a read command after
2.5/4
receiving it.
3/5
Diabled
Enables to set the interleave mode of the SDRM
2 Bank
interface which allows banks of SDRAM to
4 Bank
alternate their refresh and access cycles.
8 Bank
This item sets the length of time taking to
2T
precharge a row in the memory module before
3T
a row being active and appears only when
4T
DRAM timing is set at Manual. Longer values
5T
are safer but probably not acting the best
performance.
This item sets the length of time that a row
05T, 06T, 08T,09T
staying active fore precharging and appears only
10T, 11T, 12T, 13T
when DRAM timing is set at Manual. Longer
14T, 15T, 16T, 17T
values are safer but probably not acting the best
18T, 19T, 20T
performance.
2T
This timing controls the length of the delay
3T
between when a memory bank is activated to
4T
when a read/write command is sent to that bank.
5T
Set the REF to ACT/REF to REF timing.
This field appears when DRAM Timing is set at
Manual.
2T
Set
3T
successive ACTIVE commands to the different
4T
banks. This field appears when DRAM Timing is
5T
set at Manual.
This bits control the number of clocks that are
2T
inserted between a read command to a row
3T
precharge command to the same rank.
1T/2T
Allows to set the Write to Read CMD function.
2T/3T
Write recovery time is a standard DDR2 timing
parameter minimum time between a write
2T
command
3T
command to the same bank. The parameter is
4T
programmable on DDR2 SODIMMs and the
5T
value used above must match the largest delay
programmed in any SODIMM in the system.
2T Command
Allows to set the DRAM Command Rate.
1T Command
Manual
Allows to select RSDAIT Mode.
Auto
3
Allows to set RSDAIT selectiion.
Description
the
minimum
time
and
subsequent
ECM-CX700 Series User's Manual 63
User's Manual
interval
between
prechanrge

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