Sp623 Ibert; Getting Started Guide; Overview; Requirements - Xilinx SP623 Getting Started Manual

SP623 IBERT

Getting Started Guide

Overview

This document provides a procedure for setting up the SP623 Spartan®-6 FPGA
GTP Transceiver Characterization Board to run the Integrated Bit Error Ratio Test (IBERT)
demonstration. The designs that are required to run the IBERT demonstration are stored in
the CompactFlash memory card that is provided with the SP623 board. The demonstration
shows the capabilities of the Spartan-6 XC6SLX150T FPGA GTP transceivers.
The IBERT demonstration is performed twice, once for each of the two designs included on
the CompactFlash memory card. The first design tests the transceivers located on the top
half of the FPGA (GTP Duals 101 and 123), the second design tests the transceivers on the
bottom half of the FPGA (GTP Duals 245 and 267). The procedure consists of:
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The SP623 board is described in detail in UG751, SP623 Spartan-6 FPGA GTP Transceiver
Characterization Board User Guide.

Requirements

The equipment and software required to run the demonstration are:
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SP623 IBERT Getting Started Guide
UG752 (v1.0.1) January 26, 2011
Extracting the IBERT Demonstration
Setting Up the SP623 Board.
Connecting the GTP Transceivers and Reference
Configuring the FPGA.
Setting Up the ChipScope Pro Analyzer
Running the IBERT Demonstration.
SP623 Spartan-6 FPGA GTP Transceiver Characterization Board including:
• CompactFlash memory card containing the IBERT demonstration designs
• GTP transceiver power supply module (installed on SP623 board)
• SuperClock-2 module (installed on SP623 board)
• 12 SMA to SMA cables
One of these download cables:
• Platform Cable USB-II (DLC10)
• Parallel IV Cable (PC4)
Host PC with USB ports and a PCMCIA interface
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