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Chapter 5: Troubleshooting
To run the self tests
1 See "Perform System Self-Tests" on page 30.
Self-Test Descriptions
The self-tests for the logic analyzer identify the correct operation of major
functional areas in the module.
Interface FPGA Register Test. The purpose of this test is to verify that the
backplane interface can communicate with the backplane FPGA. This FPGA
must be working before any of the other circuits on the board will work. The
backplane FPGA is the interface between the backplane and the Memory
Controller FPGAs and Analysis Chips. Also, the Backplane FPGA generates the
board ID code that is used to identify the module and slot.
Load Memory FPGA Test. The purpose of this test is to verify that the Memory
Controller FPGAs can be loaded with their respective configuration data files.
Memory FPGA Register Test. The purpose of this test is to verify that the
registers in the Memory Controller FPGAs can be written to and read back.
EEPROM Test. The purpose of this test is to verify:
The address and data paths to the EEPROM
That each cell in the EEPROM can be programmed high and low
That individual locations can be independently addressed
The EEPROM can be block erased
Memory Data Bus Test. The purpose of this test is to check the data write/read
access of the acquisition RAM from the module backplane bus. This test verifies
the operation of the RAM data bus as well as some of the operation of the RAM
control and address busses. This is the first test that accesses the RAM
acquisition memory using the Memory Controller FPGAs.
Memory Address Bus Test. The purpose of this test is to completely verify the
acquisition RAM address lines.
Memory Signals Test. The purpose of this test is to verify signal integrity and
proper read/write synchronization between the Memory Controller FPGAs and
the acquisition RAM memory devices.
HW Assisted Memory Cell Test. The purpose of this test is to fully check all of
the addresses in all acquisition RAM memory devices.
Memory Unload Modes Test. The purpose of this test is to check the various
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